HDL, SDL, Verification/Verilog, System Verilog/HDL Chip Design- A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog.pdf 40.6 MB
HDL, SDL, Verification/Verilog, System Verilog/Advanced_Digital_Design_Verilog_HDL.djvu 23.0 MB
HDL, SDL, Verification/Verilog, System Verilog/(ebook) Chu - FPGA Prototyping Using Verilog Examples.pdf 19.1 MB
HDL, SDL, Verification/Verilog, System Verilog/Poliakov_Yazyki_VHDL_i_VERILOG.pdf 13.8 MB
HDL, SDL, Verification/Verilog, System Verilog/ReuseMethodologyManual.V2.RMM.Verilog.VHDL.BY.SINX.pdf 11.8 MB
HDL, SDL, Verification/Verilog, System Verilog/Kluwer.Academic.The.Verilog.Hardware.Description.Language.Fifth.Edition.pdf 8.1 MB
HDL, SDL, Verification/Verilog, System Verilog/THE_DESIGNERS_GUIDE_TO_VERILOG_AMS_Kenneth_Kundert.pdf 7.8 MB