fpga -移花宫 -武林禁地，闲人禁止入内

fpga-gnw-opt

Hardware - Frame/Crab Grab (White case).gnw 3.3 MB
Hardware - Frame/Crab Grab.gnw 3.3 MB
Hardware - Frame/Donkey Kong II.gnw 3.3 MB
Hardware - Frame/Donkey Kong Jr. (New Wide Screen).gnw 3.3 MB
Hardware - Frame/Donkey Kong.gnw 3.3 MB
Hardware - Frame/Fire Attack (Bandits).gnw 3.3 MB
Hardware - Frame/Fire Attack.gnw 3.3 MB
Hardware - Frame/Green House.gnw 3.3 MB
Hardware - Frame/Life Boat.gnw 3.3 MB
Hardware - Frame/Manhole (New Wide Screen).gnw 3.3 MB
Hardware - Frame/Mario Bros..gnw 3.3 MB
Hardware - Frame/Mario's Cement Factory (New Wide Screen).gnw 3.3 MB
Hardware - Frame/Mickey & Donald.gnw 3.3 MB
Hardware - Frame/Oil Panic.gnw 3.3 MB
Hardware - Frame/Rain Shower.gnw 3.3 MB
Hardware - Frame/Snoopy Tennis.gnw 3.3 MB
Hardware - Frame/Spitball Sparky (White case).gnw 3.3 MB
Hardware - Frame/Spitball Sparky.gnw 3.3 MB
Hardware - Frame/Squish.gnw 3.3 MB
Hardware - Frame/Tropical Fish.gnw 3.3 MB

[磁力链接] 添加时间:2024-10-28 大小:1.6 GB 最近下载:2025-11-26 热度:2975

mister-fpga-extra-neo-geo-roms

kof98Ultimate.zip 51.5 MB
kof98ae2016.zip 50.5 MB
samsh5fep.zip 40.4 MB
kof99ae.zip 39.6 MB
kof97ae.zip 34.0 MB
The King of Fighters '96 - Anniversary Edition.zip 28.2 MB
Fatal Fury Special Upper.zip 11.0 MB
romsets.xml 41.1 kB
mister-fpga-extra-neo-geo-roms_meta.sqlite 32.8 kB
mister-fpga-extra-neo-geo-roms_meta.xml 1.8 kB

[磁力链接] 添加时间:2024-11-23 大小:255.1 MB 最近下载:2025-09-09 热度:242

mister-fpga-extra-neo-geo-roms

kof98Ultimate.zip 51.5 MB
kof98ae2016.zip 50.5 MB
samsh5fep.zip 40.4 MB
kof99ae.zip 39.6 MB
kof97ae.zip 34.0 MB
The King of Fighters '96 - Anniversary Edition.zip 28.2 MB
KOF 94 Team Edit Edition.neo 25.4 MB
Fatal Fury Special Upper.zip 11.0 MB
romsets.xml 41.1 kB
mister-fpga-extra-neo-geo-roms_meta.sqlite 36.9 kB
mister-fpga-extra-neo-geo-roms_meta.xml 1.8 kB

[磁力链接] 添加时间:2024-12-31 大小:280.5 MB 最近下载:2025-01-12 热度:4

[ DevCourseWeb.com ] Udemy - Digital IC - FPGA Design P3 - Common Used Hardware Architectures

~Get Your Files Here !/2 - SRAM/1 -Behavior of SRAM and Usage Suggestions.mp4 403.5 MB
~Get Your Files Here !/4 - Pipeline Design/2 -Pipeline Design Example BIN2BCD.mp4 315.3 MB
~Get Your Files Here !/3 - Handshake Interface and Synchronous FIFO/1 -Handshake Interface and Sync_FIFO.mp4 208.8 MB
~Get Your Files Here !/4 - Pipeline Design/1 -Pipeline Fundamental.mp4 132.6 MB
~Get Your Files Here !/3 - Handshake Interface and Synchronous FIFO/2 -Depth Calculation for FIFO.mp4 109.2 MB
~Get Your Files Here !/1 - Introduction/1 -Introduction.mp4 14.9 MB
~Get Your Files Here !/Bonus Resources.txt 386 Bytes
Get Bonus Downloads Here.url 182 Bytes

[磁力链接] 添加时间:2025-01-12 大小:1.2 GB 最近下载:2025-11-25 热度:1687

[CourserHub.com] Coursera - FPGA Design for Embedded Systems Specialization

[CourserHub.com] Coursera - FPGA Design for Embedded Systems Specialization.part1.rar 1.4 GB
[CourserHub.com] Coursera - FPGA Design for Embedded Systems Specialization.part2.rar 1.2 GB

[磁力链接] 添加时间:2025-01-30 大小:2.6 GB 最近下载:2025-11-17 热度:281

[ DevCourseWeb.com ] Udemy - Hands-on development of cpu- soc on FPGA using vhdl(verilog)

~Get Your Files Here !/18 -888.mp4 461.5 MB
~Get Your Files Here !/14 -how to control memory operation, register operation, alu operation etc.mp4 304.8 MB
~Get Your Files Here !/6 -Extracting instruction set from RISC-V datasheet.mp4 261.9 MB
~Get Your Files Here !/8 -how to setup the read and write register alias table.mp4 203.3 MB
~Get Your Files Here !/7 -introducing the counter-track out-of-order execution.mp4 176.0 MB
~Get Your Files Here !/17 -the cache control.mp4 171.0 MB
~Get Your Files Here !/16 -how to setup the cache control for hit, miss, cache address and memory address.mp4 150.4 MB
~Get Your Files Here !/15 -how control handles cache misses and cache hit.mp4 128.1 MB
~Get Your Files Here !/13 -how to connect different units using the control.mp4 127.9 MB
~Get Your Files Here !/19 -top wiring and conclusion.mp4 110.6 MB
~Get Your Files Here !/3 -accessing resource file.mp4 110.4 MB
~Get Your Files Here !/9 -feedback how to return registers after instruction exec using output buffers.mp4 101.4 MB
~Get Your Files Here !/5 -how to link program memory to instruction buffer and program counter buffer.mp4 86.8 MB
~Get Your Files Here !/11 -architecture of a register bank.mp4 72.5 MB
~Get Your Files Here !/12 -how to handle multiple function units. introducing memory buffers.mp4 54.7 MB
~Get Your Files Here !/10 -How to design a simple ALU.mp4 49.2 MB
~Get Your Files Here !/2 -Architecture of the design.mp4 47.9 MB
~Get Your Files Here !/4 -How to design the program memory.mp4 39.5 MB
~Get Your Files Here !/1 -Introduction.mp4 21.2 MB
~Get Your Files Here !/3 -class_resources.zip 11.6 MB

[磁力链接] 添加时间:2025-02-13 大小:2.7 GB 最近下载:2025-11-16 热度:1946

[ WebToolTip.com ] Udemy - FPGA Timings P2 - Clock Domain Crossing(CDC) with Vivado 2024

~Get Your Files Here !/1 - Getting Started with Vivado CDC/11 -False Violations.mp4 43.0 MB
~Get Your Files Here !/2 - Synchronizer/8 -Usage of ASYNC_REG attributes P1.mp4 42.2 MB
~Get Your Files Here !/3 - Single bit CDC/12 -xpm_cdc_single used case P2.mp4 39.8 MB
~Get Your Files Here !/2 - Synchronizer/5 -Synchronizer.mp4 39.8 MB
~Get Your Files Here !/3 - Single bit CDC/6 -Async Reset P3.mp4 38.7 MB
~Get Your Files Here !/2 - Synchronizer/1 -Why combinational output should not be used as input to synchronizer P1.mp4 36.5 MB
~Get Your Files Here !/1 - Getting Started with Vivado CDC/22 -Understanding report_cdc P3.mp4 35.3 MB
~Get Your Files Here !/4 - Multibit CDC/16 -Counter Crossing Manual Approach P7.mp4 34.5 MB
~Get Your Files Here !/2 - Synchronizer/15 -Using Primitives in CDC flow P2.mp4 32.3 MB
~Get Your Files Here !/4 - Multibit CDC/31 -Understanding XPM_CDC_HANDSHAKE P2.mp4 31.2 MB
~Get Your Files Here !/4 - Multibit CDC/32 -Understanding XPM_CDC_HANDSHAKE P3.mp4 30.9 MB
~Get Your Files Here !/1 - Getting Started with Vivado CDC/26 -Understanding report_cdc info P4.mp4 30.3 MB
~Get Your Files Here !/1 - Getting Started with Vivado CDC/23 -Understanding report_cdc info P1.mp4 30.1 MB
~Get Your Files Here !/3 - Single bit CDC/10 -Understanding xpm_cdc_single.mp4 29.7 MB
~Get Your Files Here !/2 - Synchronizer/2 -Why combinational output should not be used as input to synchronizer P2.mp4 29.3 MB
~Get Your Files Here !/1 - Getting Started with Vivado CDC/7 -Demonstration P2.mp4 29.3 MB
~Get Your Files Here !/5 - MTBF/3 -Understanding MTBF & Improving strategies P3.mp4 29.1 MB
~Get Your Files Here !/4 - Multibit CDC/28 -Understanding xpm_fifo_async P2.mp4 27.3 MB
~Get Your Files Here !/1 - Getting Started with Vivado CDC/9 -Clock Interaction report P2.mp4 27.2 MB
~Get Your Files Here !/4 - Multibit CDC/30 -Understanding XPM_CDC_HANDSHAKE P1.mp4 26.9 MB

[磁力链接] 添加时间:2025-07-13 大小:1.9 GB 最近下载:2025-11-27 热度:364

[ CourseLala.com ] Udemy - FPGA Piano

~Get Your Files Here !/8. One Key Module Coding.mp4 190.6 MB
~Get Your Files Here !/2. Make Buzzer Buzzing.mp4 184.6 MB
~Get Your Files Here !/9. One Key Module Simulation.mp4 128.6 MB
~Get Your Files Here !/6. Buzzer Module Simulation.mp4 108.1 MB
~Get Your Files Here !/5. Buzzer Module Coding.mp4 101.6 MB
~Get Your Files Here !/12. Key Module Solution2 Coding.mp4 88.4 MB
~Get Your Files Here !/11. Key Module Solution1 Simultion.mp4 87.2 MB
~Get Your Files Here !/10. Key Module Solution1 Coding.mp4 74.9 MB
~Get Your Files Here !/16. LED Module Simulation.mp4 71.6 MB
~Get Your Files Here !/19. Run on Board.mp4 66.7 MB
~Get Your Files Here !/18. Top Module Simulation.mp4 66.7 MB
~Get Your Files Here !/17. Top Module Coding.mp4 59.1 MB
~Get Your Files Here !/1. System Target.mp4 57.9 MB
~Get Your Files Here !/15. LED Module Coding.mp4 48.3 MB
~Get Your Files Here !/7. Key Module Status Machine.mp4 33.3 MB
~Get Your Files Here !/13. Key Module Solution2 Simulation.mp4 23.1 MB
~Get Your Files Here !/4. Buzzer Module Status Machine.mp4 18.1 MB
~Get Your Files Here !/3. System Analysis.mp4 15.4 MB
~Get Your Files Here !/14. LED Module Status Machine.mp4 10.1 MB
~Get Your Files Here !/8. One Key Module Coding.srt 31.9 kB

[磁力链接] 添加时间:2025-08-13 大小:1.4 GB 最近下载:2025-11-26 热度:62

[ WebToolTip.com ] Udemy - Learn FPGA design with VHDL - Sobel Filter Edge Detection

~Get Your Files Here !/4 - numeric_std package in VHDL/1 -numeric_std package in VHDL.mp4 171.8 MB
~Get Your Files Here !/6 - Implementing the edge detection design/3 -VHDL implementation - 1.mp4 130.5 MB
~Get Your Files Here !/6 - Implementing the edge detection design/8 -Demonstration.mp4 128.6 MB
~Get Your Files Here !/6 - Implementing the edge detection design/1 -Architecture of the edge detection design.mp4 128.5 MB
~Get Your Files Here !/6 - Implementing the edge detection design/7 -Automating with Makefile and python.mp4 128.1 MB
~Get Your Files Here !/5 - Implementing the Sobel filter in VHDL/2 -VHDL implementation - 1.mp4 114.1 MB
~Get Your Files Here !/6 - Implementing the edge detection design/2 -The memories in the design.mp4 108.6 MB
~Get Your Files Here !/6 - Implementing the edge detection design/4 -VHDL implementation - 2.mp4 96.5 MB
~Get Your Files Here !/3 - Digital arithmetics basics/2 -Binary addition - 1.mp4 87.6 MB
~Get Your Files Here !/5 - Implementing the Sobel filter in VHDL/4 -Simulation.mp4 87.6 MB
~Get Your Files Here !/1 - Introduction/1 -Introduction.mp4 82.7 MB
~Get Your Files Here !/2 - Image processing basics/1 -Digital image.mp4 80.8 MB
~Get Your Files Here !/2 - Image processing basics/2 -Gradient.mp4 74.5 MB
~Get Your Files Here !/5 - Implementing the Sobel filter in VHDL/3 -VHDL implementation - 2.mp4 67.1 MB
~Get Your Files Here !/2 - Image processing basics/3 -Convolution.mp4 46.5 MB
~Get Your Files Here !/2 - Image processing basics/4 -Sobel filter.mp4 42.4 MB
~Get Your Files Here !/5 - Implementing the Sobel filter in VHDL/1 -State machine of the Sobel filter.mp4 41.4 MB
~Get Your Files Here !/3 - Digital arithmetics basics/5 -Binary multiplication.mp4 40.1 MB
~Get Your Files Here !/3 - Digital arithmetics basics/4 -Binary shift.mp4 39.8 MB
~Get Your Files Here !/6 - Implementing the edge detection design/5 -Note about VGA.mp4 22.5 MB

[磁力链接] 添加时间:2025-10-14 大小:1.8 GB 最近下载:2025-11-26 热度:87