fpga -移花宫 -武林禁地，闲人禁止入内

Mentor FPGA Advantage 8.1.iso

Mentor FPGA Advantage 8.1.iso 644.1 MB

[磁力链接] 添加时间:2017-04-23 大小:644.1 MB 最近下载:2024-12-10 热度:213

Mentor FPGA

Mentor FPGA Advantage 8.1.iso 644.1 MB

[磁力链接] 添加时间:2017-06-18 大小:644.1 MB 最近下载:2024-12-28 热度:266

Mentor FPGA Advantage 8.1

fa.exe 643.2 MB
MGLS.DLL 570.4 kB
MentorKG.exe 313.9 kB
Environment.reg 406 Bytes
README.txt 240 Bytes
license.src 167 Bytes
MakeLic.bat 108 Bytes

[磁力链接] 添加时间:2017-05-27 大小:644.1 MB 最近下载:2024-12-19 热度:69

FPGA Advantage 8.1

Keygen/Mentor.kg.02.03.09.rar 873.4 kB
fa.exe 643.2 MB
READMEPC.TXT 4.8 kB

[磁力链接] 添加时间:2017-02-10 大小:644.1 MB 最近下载:2025-03-09 热度:826

FPGA Filter

2 - FPGA Median Filter/7 - FPGA Median Filter 04 Median Module Coding.mp4 95.6 MB
1 - FPGA Mean Average Filter/3 - FPGA Mean Average Filter 03 Simulation.mp4 71.7 MB
2 - FPGA Median Filter/8 - FPGA Median Filter 05 Median Module Simulation.mp4 67.3 MB
3 - FPGA Gaussian Filter/11 - FPGA Gaussian Filter 03 Simulation.mp4 67.1 MB
3 - FPGA Gaussian Filter/10 - FPGA Gaussian Filter 02 Coding.mp4 63.5 MB
2 - FPGA Median Filter/6 - FPGA Median Filter 03 Sort Module Simulation.mp4 63.1 MB
1 - FPGA Mean Average Filter/2 - FPGA Mean Average Filter 02 Coding.mp4 52.8 MB
2 - FPGA Median Filter/5 - FPGA Median Filter 02 Sort Module Coding.mp4 47.8 MB
3 - FPGA Gaussian Filter/9 - FPGA Gaussian Filter 01 Introduction.mp4 32.3 MB
2 - FPGA Median Filter/4 - FPGA Median Filter 01 Introduction.mp4 17.4 MB
1 - FPGA Mean Average Filter/1 - FPGA Mean Average Filter 01 Introduction.mp4 11.5 MB
2 - FPGA Median Filter/7 - FPGA Median Filter 04 English.vtt 13.4 kB
3 - FPGA Gaussian Filter/10 - FPGA Gaussian Filter 02 English.vtt 9.3 kB
2 - FPGA Median Filter/8 - FPGA Median Filter 05 English.vtt 7.7 kB
1 - FPGA Mean Average Filter/3 - FPGA Mean Average Filter 03 English.vtt 7.4 kB
1 - FPGA Mean Average Filter/2 - FPGA Mean Average Filter 02 English.vtt 7.2 kB
2 - FPGA Median Filter/6 - FPGA Median Filter 03 English.vtt 7.0 kB
3 - FPGA Gaussian Filter/11 - FPGA Gaussian Filter 03 English.vtt 6.8 kB
2 - FPGA Median Filter/5 - FPGA Median Filter 02 English.vtt 6.5 kB
3 - FPGA Gaussian Filter/9 - FPGA Gaussian Filter 01 English.vtt 6.3 kB

[磁力链接] 添加时间:2023-12-17 大小:590.2 MB 最近下载:2025-03-13 热度:2601

fpga-gnw-opt

Hardware - Frame/Crab Grab (White case).gnw 3.3 MB
Hardware - Frame/Crab Grab.gnw 3.3 MB
Hardware - Frame/Donkey Kong II.gnw 3.3 MB
Hardware - Frame/Donkey Kong Jr. (New Wide Screen).gnw 3.3 MB
Hardware - Frame/Donkey Kong.gnw 3.3 MB
Hardware - Frame/Fire Attack (Bandits).gnw 3.3 MB
Hardware - Frame/Fire Attack.gnw 3.3 MB
Hardware - Frame/Green House.gnw 3.3 MB
Hardware - Frame/Life Boat.gnw 3.3 MB
Hardware - Frame/Manhole (New Wide Screen).gnw 3.3 MB
Hardware - Frame/Mario Bros..gnw 3.3 MB
Hardware - Frame/Mario's Cement Factory (New Wide Screen).gnw 3.3 MB
Hardware - Frame/Mickey & Donald.gnw 3.3 MB
Hardware - Frame/Oil Panic.gnw 3.3 MB
Hardware - Frame/Rain Shower.gnw 3.3 MB
Hardware - Frame/Snoopy Tennis.gnw 3.3 MB
Hardware - Frame/Spitball Sparky (White case).gnw 3.3 MB
Hardware - Frame/Spitball Sparky.gnw 3.3 MB
Hardware - Frame/Squish.gnw 3.3 MB
Hardware - Frame/Tropical Fish.gnw 3.3 MB

[磁力链接] 添加时间:2024-04-08 大小:588.0 MB 最近下载:2025-03-12 热度:1715

FPGA Development in VHDL - Beyond the Basics

03.Working with Custom Data Types/09.Summary.srt 832 Bytes
07.Testing Your Designs/05.Summary.srt 1.0 kB
04.Monitoring Signal States with Attributes/01.Overview.srt 1.1 kB
06.Constructing State Machines/07.Summary.srt 1.1 kB
07.Testing Your Designs/01.Overview.srt 1.1 kB
04.Monitoring Signal States with Attributes/06.Type Kind Attributes.srt 1.1 kB
06.Constructing State Machines/03.State Machine Types.srt 1.2 kB
03.Working with Custom Data Types/01.Overview.srt 1.3 kB
04.Monitoring Signal States with Attributes/02.What Are Attributes.srt 1.4 kB
06.Constructing State Machines/01.Overview.srt 1.4 kB
05.Keeping Code Organized with Subprograms and Packages/07.Summary.srt 1.4 kB
02.Developing for the FPGA/02.Module Overview.srt 1.5 kB
03.Working with Custom Data Types/04.Subtypes.srt 1.5 kB
05.Keeping Code Organized with Subprograms and Packages/01.Overview.srt 1.5 kB
02.Developing for the FPGA/08.Summary.srt 1.5 kB
04.Monitoring Signal States with Attributes/08.Summary.srt 1.7 kB
03.Working with Custom Data Types/05.Multidimensional Arrays.srt 1.8 kB
01.Course Overview/01.Course Overview.srt 2.0 kB
06.Constructing State Machines/02.What Is a State Machine.srt 2.2 kB
03.Working with Custom Data Types/06.Record Types.srt 2.6 kB

[磁力链接] 添加时间:2017-07-06 大小:541.2 MB 最近下载:2025-03-13 热度:5311

Getting Started with FPGA Programming with VHDL

05.Writing Sequential Code/09.Summary.srt 649 Bytes
04.Introduction to VHDL/07.Summary.srt 995 Bytes
07.Packages and Components/07.Summary.srt 1.1 kB
08.Debugging and Analysis/04.Summary.srt 1.2 kB
08.Debugging and Analysis/01.Overview.srt 1.3 kB
03.Digital Design Primer/08.Summary.srt 1.3 kB
02.FPGA Technology Overview/02.Module Overview.srt 1.4 kB
03.Digital Design Primer/01.Overview.srt 1.4 kB
04.Introduction to VHDL/01.Introduction.srt 1.5 kB
02.FPGA Technology Overview/09.Summary.srt 1.6 kB
03.Digital Design Primer/07.Logic Element.srt 1.6 kB
06.Writing Concurrent Code/06.Clocks.srt 2.1 kB
07.Packages and Components/01.Overview.srt 2.1 kB
06.Writing Concurrent Code/08.Summary.srt 2.2 kB
08.Debugging and Analysis/05.Course Summary.srt 2.2 kB
03.Digital Design Primer/02.Boolean Logic.srt 2.6 kB
02.FPGA Technology Overview/07.Pin Assignments and the Pin Planner.srt 2.7 kB
03.Digital Design Primer/06.Clocks and Timing.srt 2.9 kB
01.Course Overview/01.Course Overview.srt 2.9 kB
05.Writing Sequential Code/02.Signals.srt 3.2 kB

[磁力链接] 添加时间:2017-07-03 大小:520.8 MB 最近下载:2025-03-13 热度:9181

Haskell R. Digital Design Using Digilent FPGA Boards...2010

Haskell R. Digital Design Using Digilent FPGA Boards...2010.pdf 160.3 MB
Wakerly J. Digital Design. Principles and Practices 4ed 2006.pdf 111.1 MB
Haskell R. Learning By Example Using VHDL...2009.pdf 84.2 MB
Harris S. Digital Design and Computer Architecture ARM Ed 2016.pdf 35.9 MB
Harris S. Digital Design and Computer Architecture 2ed 2013.pdf 25.9 MB
Harris D. Digital Design and Computer Architecture. RISC-V Ed 2022.pdf 24.5 MB
Mano M. Digital Design With an Introduction to the VHDL 6ed 2017.pdf 23.6 MB
Mano M. Digital Design With an Introduction to the VHDL 6ed 2019.pdf 20.4 MB
Wakerly J. Digital Design. Principles and Practices 5ed 2018.pdf 19.9 MB
Mano M. Digital Design With an Introduction to the VHDL 5ed 2013.pdf 3.1 MB
Readme.txt 836 Bytes

[磁力链接] 添加时间:2022-02-18 大小:509.1 MB 最近下载:2025-03-14 热度:1242

[ FreeCourseWeb.com ] PluralSight - Getting Started with FPGA Programming with VHDL.zip

[ FreeCourseWeb.com ] PluralSight - Getting Started with FPGA Programming with VHDL.zip 502.5 MB

[磁力链接] 添加时间:2021-05-08 大小:502.5 MB 最近下载:2025-03-11 热度:834

[udemy] Xilinx Vivado Beginners Course to FPGA Development in VHDL [MyFOM]

MyFreeOnlineMovies.co.uk.html 189.0 kB
Section 1 Introduction to Vivado/How to Download and Install Xilinx Vivado Design Suite.mp4 42.2 MB
Section 1 Introduction to Vivado/Introduction.mp4 16.9 MB
Section 2 Lab 1/Coding and Simulating Simple VHDL in Vivado.mp4 36.2 MB
Section 2 Lab 1/Downloading the Bit-stream to the FPGA.mp4 48.5 MB
Section 2 Lab 1/Implementation of VHDL Design in Vivado and IO Pin Planning.mp4 72.5 MB
Section 2 Lab 1/Introduction to the Vivado Design Suite Interface and Creating a New Project.mp4 47.8 MB
Section 3 Lab 2/Design a Block RAM in IP Integrator.mp4 53.0 MB
Section 3 Lab 2/Simulating BRAM memory IP in Vivado.mp4 23.3 MB
Section 4 Lab 3/Designing a Microblaze Soft Processor in Vivado IP Integrator.mp4 62.0 MB
Section 4 Lab 3/Generating a Microblaze using TCL commands in Vivado.mp4 21.1 MB
Section 4 Lab 3/Learn VHDL by Example.mp4 60.0 MB
Section 4 Lab 3/New Text Document.txt 52 Bytes
Section 5 Conclusion and Bonus Section/Sorry the files are deleted bare with me.txt 51 Bytes
Torrent Downloaded from Glodls.to.txt 237 Bytes