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Getting Started with FPGA Programming with VHDL

  • 05.Writing Sequential Code/09.Summary.srt 649 Bytes
  • 04.Introduction to VHDL/07.Summary.srt 995 Bytes
  • 07.Packages and Components/07.Summary.srt 1.1 kB
  • 08.Debugging and Analysis/04.Summary.srt 1.2 kB
  • 08.Debugging and Analysis/01.Overview.srt 1.3 kB
  • 03.Digital Design Primer/08.Summary.srt 1.3 kB
  • 02.FPGA Technology Overview/02.Module Overview.srt 1.4 kB
  • 03.Digital Design Primer/01.Overview.srt 1.4 kB
  • 04.Introduction to VHDL/01.Introduction.srt 1.5 kB
  • 02.FPGA Technology Overview/09.Summary.srt 1.6 kB
  • 03.Digital Design Primer/07.Logic Element.srt 1.6 kB
  • 06.Writing Concurrent Code/06.Clocks.srt 2.1 kB
  • 07.Packages and Components/01.Overview.srt 2.1 kB
  • 06.Writing Concurrent Code/08.Summary.srt 2.2 kB
  • 08.Debugging and Analysis/05.Course Summary.srt 2.2 kB
  • 03.Digital Design Primer/02.Boolean Logic.srt 2.6 kB
  • 02.FPGA Technology Overview/07.Pin Assignments and the Pin Planner.srt 2.7 kB
  • 03.Digital Design Primer/06.Clocks and Timing.srt 2.9 kB
  • 01.Course Overview/01.Course Overview.srt 2.9 kB
  • 05.Writing Sequential Code/02.Signals.srt 3.2 kB
[磁力链接] 添加时间:2017-07-03 大小:520.8 MB 最近下载:2025-11-03 热度:11807

Synopsys FPGA P-2019.03-SP1 Win

  • fpga_vP-2019.03-SP1_win.exe 1.3 GB
  • Crack/scl_v2018.06-SP1_windows.exe 191.8 MB
  • Crack/scl_keygen.exe 4.7 MB
  • Crack/LicGen.exe 691.2 kB
  • Crack/synopsys_checksum 663.2 kB
  • Crack/pubkey_verify 659.2 kB
  • Crack/licgen.dll 651.3 kB
  • Crack/Synopsys.src 588.2 kB
  • Crack/synopsys_checksum.exe 138.2 kB
  • Crack/pubkey_verify.exe 132.6 kB
  • Crack/packs/Synopsys.dll 20.5 kB
  • Crack/packs/Synopsys.src 16.3 kB
  • Crack/Readme.txt 6.6 kB
  • Crack/packs/Synopsys.lpd 952 Bytes
  • Crack/fix.bat 712 Bytes
[磁力链接] 添加时间:2021-05-18 大小:1.5 GB 最近下载:2025-11-12 热度:11798

HDL Books - VHDL FPGA CPLD Verilog Digital Electronics eBook

  • 0131972553 - (2005) Digital Fundamentals.pdf 492.0 MB
  • 0126912955 - (2000) Engineering Digital Design.pdf 50.6 MB
  • 0792397460 - (1996) LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS.pdf 41.7 MB
  • 0965193438 - (1996) HDL Chip Design- A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog.pdf 40.6 MB
  • 0471720925 - (2006) RTL Hardware Design Using VHDL Coding for Efficiency, Portability, and Scalability.pdf 35.8 MB
  • 0072460857 - (2005) Fundamentals of Digital Logic with VHDL Design.pdf 35.6 MB
  • 0132543036 - (2011) Digital Electronics - A Practical Approach with VHDL - 9th Edition.pdf 33.6 MB
  • 0470828498 - (2011) Design for Embedded Image Processing on FPGAs.pdf 28.7 MB
  • 0070471649 - (1999) Verilog Digital System Design.pdf 28.3 MB
  • 0134516753 - (1996) Verilog HDL A Guide to Digital Design and Synthesis B.pdf 22.4 MB
  • 0470185317 - (2008) FPGA Prototyping by VHDL Examples - Xilinx Spartan-3 Version.pdf 22.3 MB
  • 0131543180 - (2005) Practical FPGA Programming in C.chm 18.2 MB
  • 1402055293 - (2007) Processor Design System-On-Chip Computing for ASICs and FPGAs.pdf 15.6 MB
  • 0387284850 - (2006) FPGA Implementations of neural networks.pdf 14.7 MB
  • 0136507638 - (1996) VHDL Made Easy.pdf 13.8 MB
  • 0412616505 - (1997) VHDL A logic synthesis approach.pdf 13.4 MB
  • 1934404055 - (2007) Digital Circuit Analysis and Design with Simulink Modeling and Introduction to CPLDs and FPGAs 2nd Ed.pdf 13.4 MB
  • 0077221435 - (2008) Fundamentals of Digital Logic with VHDL Design - Ed. 3.pdf 12.8 MB
  • 0792395980 - (1995) VHDL Coding Styles and Methodologies.pdf 12.7 MB
  • 0123744385 - (2009) Low-Power Design of Nanometer FPGAs Architecture and EDA.pdf 12.6 MB
[磁力链接] 添加时间:2017-02-25 大小:1.2 GB 最近下载:2025-11-09 热度:9225

FPGA Development in VHDL - Beyond the Basics

  • 03.Working with Custom Data Types/09.Summary.srt 832 Bytes
  • 07.Testing Your Designs/05.Summary.srt 1.0 kB
  • 04.Monitoring Signal States with Attributes/01.Overview.srt 1.1 kB
  • 06.Constructing State Machines/07.Summary.srt 1.1 kB
  • 07.Testing Your Designs/01.Overview.srt 1.1 kB
  • 04.Monitoring Signal States with Attributes/06.Type Kind Attributes.srt 1.1 kB
  • 06.Constructing State Machines/03.State Machine Types.srt 1.2 kB
  • 03.Working with Custom Data Types/01.Overview.srt 1.3 kB
  • 04.Monitoring Signal States with Attributes/02.What Are Attributes.srt 1.4 kB
  • 06.Constructing State Machines/01.Overview.srt 1.4 kB
  • 05.Keeping Code Organized with Subprograms and Packages/07.Summary.srt 1.4 kB
  • 02.Developing for the FPGA/02.Module Overview.srt 1.5 kB
  • 03.Working with Custom Data Types/04.Subtypes.srt 1.5 kB
  • 05.Keeping Code Organized with Subprograms and Packages/01.Overview.srt 1.5 kB
  • 02.Developing for the FPGA/08.Summary.srt 1.5 kB
  • 04.Monitoring Signal States with Attributes/08.Summary.srt 1.7 kB
  • 03.Working with Custom Data Types/05.Multidimensional Arrays.srt 1.8 kB
  • 01.Course Overview/01.Course Overview.srt 2.0 kB
  • 06.Constructing State Machines/02.What Is a State Machine.srt 2.2 kB
  • 03.Working with Custom Data Types/06.Record Types.srt 2.6 kB
[磁力链接] 添加时间:2017-07-06 大小:541.2 MB 最近下载:2025-11-08 热度:7225

Bruno F. The FPGA Programming Handbook. An essential guide..FPGA design 2ed 2024

  • Code_2021.zip 117.9 MB
  • Bruno F. The FPGA Programming Handbook. An essential guide..FPGA design 2ed 2024.pdf 31.4 MB
  • ColorImages.pdf 28.6 MB
  • Bruno F. FPGA Programming for Beginners...with SystemVerilog 2021.pdf 17.1 MB
  • ColorImages_2021.pdf 12.5 MB
  • Code.zip 697.3 kB
[磁力链接] 添加时间:2024-09-14 大小:208.3 MB 最近下载:2025-11-12 热度:6799

Learn VHDL and FPGA Development with a BASYS 3

  • Learn VHDL and FPGA Development with a BASYS 3.tgz 1.7 GB
  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
[磁力链接] 添加时间:2017-02-20 大小:1.7 GB 最近下载:2025-11-12 热度:5396

[ FreeCourseWeb.com ] Lynda - Learning Verilog for FPGA Development.zip

  • [ FreeCourseWeb.com ] Lynda - Learning Verilog for FPGA Development.zip 322.3 MB
[磁力链接] 添加时间:2021-04-05 大小:322.3 MB 最近下载:2025-11-11 热度:5172

[ DevCourseWeb.com ] Udemy - FPGA (Field-Programmable Gate Array) Design and Implementation

  • ~Get Your Files Here !/03 - FPGA Design Flows & Design Tools/001 FPGA Design Flows & Design Tools.mp4 285.8 MB
  • ~Get Your Files Here !/04 - FPGA Design using Verilog/009 Design Examples.mp4 226.6 MB
  • ~Get Your Files Here !/20 - Memristive FPGA/001 Memristive FPGA.mp4 215.6 MB
  • ~Get Your Files Here !/12 - Reconfigurable Hardware/001 Reconfigurable Hardware.mp4 209.9 MB
  • ~Get Your Files Here !/05 - Simulate and Implement SOPC Design/001 Simulate and Implement SOPC Design.mp4 198.1 MB
  • ~Get Your Files Here !/01 - Introduction to FPGA (Field Programmable Gate Arrays)/001 Introduction to FPGA (Field Programmable Gate Arrays).mp4 192.1 MB
  • ~Get Your Files Here !/21 - Mentor Graphics Tools & Guidelines/001 Mentor Graphics Tools & Guidelines.mp4 184.3 MB
  • ~Get Your Files Here !/09 - Image Processing using FPGA/001 Image Processing using FPGA.mp4 179.7 MB
  • ~Get Your Files Here !/04 - FPGA Design using Verilog/006 Visual Verification of Designs.mp4 165.7 MB
  • ~Get Your Files Here !/19 - Programmable Chips and Boards/001 Programmable Chips and Boards.mp4 163.7 MB
  • ~Get Your Files Here !/04 - FPGA Design using Verilog/008 Finite State Machines - part 2.mp4 153.1 MB
  • ~Get Your Files Here !/14 - FPGA implementation of DSP Circuits/001 FPGA implementation of DSP Circuits.mp4 149.7 MB
  • ~Get Your Files Here !/15 - Reversible Logic Circuits/001 Reversible Logic Circuits.mp4 143.4 MB
  • ~Get Your Files Here !/07 - UART SDRAM Python/001 UART SDRAM Python.mp4 132.5 MB
  • ~Get Your Files Here !/04 - FPGA Design using Verilog/007 Finite State Machines - part 1.mp4 132.3 MB
  • ~Get Your Files Here !/11 - Protoflex/001 Protoflex.mp4 123.6 MB
  • ~Get Your Files Here !/04 - FPGA Design using Verilog/004 Procedural Assignments.mp4 119.6 MB
  • ~Get Your Files Here !/04 - FPGA Design using Verilog/001 Introduction to FPGA Design using Verilog.mp4 115.5 MB
  • ~Get Your Files Here !/04 - FPGA Design using Verilog/002 Verilog overview.mp4 111.3 MB
  • ~Get Your Files Here !/13 - Wordcount using MapReduce for FPGA/001 Wordcount using MapReduce for FPGA.mp4 109.6 MB
[磁力链接] 添加时间:2022-03-16 大小:4.3 GB 最近下载:2025-11-10 热度:4693

[ FreeCourseWeb.com ] Udemy - FPGA Embedded Design, Part 1 - Verilog.zip

  • [ FreeCourseWeb.com ] Udemy - FPGA Embedded Design, Part 1 - Verilog.zip 413.1 MB
[磁力链接] 添加时间:2021-03-19 大小:413.1 MB 最近下载:2025-11-11 热度:4629

FPGA Design Learning VHDL

  • FPGA Design Learning VHDL.tgz 1.7 GB
  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
[磁力链接] 添加时间:2017-02-12 大小:1.7 GB 最近下载:2025-11-10 热度:3968

[udemy] Xilinx Vivado Beginners Course to FPGA Development in VHDL [MyFOM]

  • MyFreeOnlineMovies.co.uk.html 189.0 kB
  • Section 1 Introduction to Vivado/How to Download and Install Xilinx Vivado Design Suite.mp4 42.2 MB
  • Section 1 Introduction to Vivado/Introduction.mp4 16.9 MB
  • Section 2 Lab 1/Coding and Simulating Simple VHDL in Vivado.mp4 36.2 MB
  • Section 2 Lab 1/Downloading the Bit-stream to the FPGA.mp4 48.5 MB
  • Section 2 Lab 1/Implementation of VHDL Design in Vivado and IO Pin Planning.mp4 72.5 MB
  • Section 2 Lab 1/Introduction to the Vivado Design Suite Interface and Creating a New Project.mp4 47.8 MB
  • Section 3 Lab 2/Design a Block RAM in IP Integrator.mp4 53.0 MB
  • Section 3 Lab 2/Simulating BRAM memory IP in Vivado.mp4 23.3 MB
  • Section 4 Lab 3/Designing a Microblaze Soft Processor in Vivado IP Integrator.mp4 62.0 MB
  • Section 4 Lab 3/Generating a Microblaze using TCL commands in Vivado.mp4 21.1 MB
  • Section 4 Lab 3/Learn VHDL by Example.mp4 60.0 MB
  • Section 4 Lab 3/New Text Document.txt 52 Bytes
  • Section 5 Conclusion and Bonus Section/Sorry the files are deleted bare with me.txt 51 Bytes
  • Torrent Downloaded from Glodls.to.txt 237 Bytes
[磁力链接] 添加时间:2017-02-10 大小:483.8 MB 最近下载:2025-11-11 热度:3966

fpga-gnw-opt

  • Hardware - Frame/Crab Grab (White case).gnw 3.3 MB
  • Hardware - Frame/Crab Grab.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong II.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong Jr. (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Donkey Kong.gnw 3.3 MB
  • Hardware - Frame/Fire Attack (Bandits).gnw 3.3 MB
  • Hardware - Frame/Fire Attack.gnw 3.3 MB
  • Hardware - Frame/Green House.gnw 3.3 MB
  • Hardware - Frame/Life Boat.gnw 3.3 MB
  • Hardware - Frame/Manhole (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mario Bros..gnw 3.3 MB
  • Hardware - Frame/Mario's Cement Factory (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mickey & Donald.gnw 3.3 MB
  • Hardware - Frame/Oil Panic.gnw 3.3 MB
  • Hardware - Frame/Rain Shower.gnw 3.3 MB
  • Hardware - Frame/Snoopy Tennis.gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky (White case).gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky.gnw 3.3 MB
  • Hardware - Frame/Squish.gnw 3.3 MB
  • Hardware - Frame/Tropical Fish.gnw 3.3 MB
[磁力链接] 添加时间:2023-12-17 大小:1.2 GB 最近下载:2025-11-12 热度:3921

[ FreeCourseWeb.com ] Udemy - Learn VHDL Design using Xilinx Zynq-7000 ARM-FPGA SoC.zip

  • [ FreeCourseWeb.com ] Udemy - Learn VHDL Design using Xilinx Zynq-7000 ARM-FPGA SoC.zip 1.6 GB
[磁力链接] 添加时间:2021-04-22 大小:1.6 GB 最近下载:2025-11-12 热度:3770

FPGA Filter

  • 2 - FPGA Median Filter/7 - FPGA Median Filter 04 Median Module Coding.mp4 95.6 MB
  • 1 - FPGA Mean Average Filter/3 - FPGA Mean Average Filter 03 Simulation.mp4 71.7 MB
  • 2 - FPGA Median Filter/8 - FPGA Median Filter 05 Median Module Simulation.mp4 67.3 MB
  • 3 - FPGA Gaussian Filter/11 - FPGA Gaussian Filter 03 Simulation.mp4 67.1 MB
  • 3 - FPGA Gaussian Filter/10 - FPGA Gaussian Filter 02 Coding.mp4 63.5 MB
  • 2 - FPGA Median Filter/6 - FPGA Median Filter 03 Sort Module Simulation.mp4 63.1 MB
  • 1 - FPGA Mean Average Filter/2 - FPGA Mean Average Filter 02 Coding.mp4 52.8 MB
  • 2 - FPGA Median Filter/5 - FPGA Median Filter 02 Sort Module Coding.mp4 47.8 MB
  • 3 - FPGA Gaussian Filter/9 - FPGA Gaussian Filter 01 Introduction.mp4 32.3 MB
  • 2 - FPGA Median Filter/4 - FPGA Median Filter 01 Introduction.mp4 17.4 MB
  • 1 - FPGA Mean Average Filter/1 - FPGA Mean Average Filter 01 Introduction.mp4 11.5 MB
  • 2 - FPGA Median Filter/7 - FPGA Median Filter 04 English.vtt 13.4 kB
  • 3 - FPGA Gaussian Filter/10 - FPGA Gaussian Filter 02 English.vtt 9.3 kB
  • 2 - FPGA Median Filter/8 - FPGA Median Filter 05 English.vtt 7.7 kB
  • 1 - FPGA Mean Average Filter/3 - FPGA Mean Average Filter 03 English.vtt 7.4 kB
  • 1 - FPGA Mean Average Filter/2 - FPGA Mean Average Filter 02 English.vtt 7.2 kB
  • 2 - FPGA Median Filter/6 - FPGA Median Filter 03 English.vtt 7.0 kB
  • 3 - FPGA Gaussian Filter/11 - FPGA Gaussian Filter 03 English.vtt 6.8 kB
  • 2 - FPGA Median Filter/5 - FPGA Median Filter 02 English.vtt 6.5 kB
  • 3 - FPGA Gaussian Filter/9 - FPGA Gaussian Filter 01 English.vtt 6.3 kB
[磁力链接] 添加时间:2023-12-17 大小:590.2 MB 最近下载:2025-11-12 热度:3736

[ FreeCourseWeb.com ] Udemy - FPGA Embedded Design, Part 2 - Basic FPGA Training.zip

  • [ FreeCourseWeb.com ] Udemy - FPGA Embedded Design, Part 2 - Basic FPGA Training.zip 1.4 GB
[磁力链接] 添加时间:2021-04-15 大小:1.4 GB 最近下载:2025-11-11 热度:3664

[ DevCourseWeb.com ] Udemy - Vivado 2020 - Learn Fpga Development Today!

  • ~Get Your Files Here !/3 - VHDL/13 - Implement your design.mp4 55.5 MB
  • ~Get Your Files Here !/5 - Processor options/20 - Testing and Simulating.mp4 51.6 MB
  • ~Get Your Files Here !/3 - VHDL/12 - Simulating your VHDL code.mp4 48.6 MB
  • ~Get Your Files Here !/5 - Processor options/26 - Generate HDL commands from c based code.mp4 39.2 MB
  • ~Get Your Files Here !/5 - Processor options/24 - Implement a Micro blaze soft Processor.mp4 38.5 MB
  • ~Get Your Files Here !/4 - Memory/19 - Creating a memory block in the integrator.mp4 36.2 MB
  • ~Get Your Files Here !/3 - VHDL/10 - Creating your first project in Vivado.mp4 33.2 MB
  • ~Get Your Files Here !/3 - VHDL/8 - Intro to VHDL.mp4 30.4 MB
  • ~Get Your Files Here !/1 - Introduction/1 - The digital design fundamentals you must learn.mp4 25.8 MB
  • ~Get Your Files Here !/2 - Digital systems/2 - Analog and Digital Systems.mp4 24.2 MB
  • ~Get Your Files Here !/4 - Memory/17 - IP integrator in Vivado.mp4 24.0 MB
  • ~Get Your Files Here !/5 - Processor options/25 - Learn TCL Commands to generate Micro blaze soft processor.mp4 23.8 MB
  • ~Get Your Files Here !/2 - Digital systems/5 - Download and install Vivado.mp4 20.6 MB
  • ~Get Your Files Here !/4 - Memory/16 - IP Flows.mp4 19.6 MB
  • ~Get Your Files Here !/5 - Processor options/23 - Processor Options.mp4 18.3 MB
  • ~Get Your Files Here !/4 - Memory/18 - Memory Controllers.mp4 18.1 MB
  • ~Get Your Files Here !/6 - Conclusion/29 - Conclusion.mp4 18.0 MB
  • ~Get Your Files Here !/3 - VHDL/9 - FPGA Design Flow.mp4 17.2 MB
  • ~Get Your Files Here !/2 - Digital systems/4 - FPGA Architecture.mp4 17.0 MB
  • ~Get Your Files Here !/3 - VHDL/11 - Vivado Design Tools.mp4 16.8 MB
[磁力链接] 添加时间:2023-12-23 大小:669.5 MB 最近下载:2025-11-11 热度:3639

elc2008-grant-likely-fpga.ogg

  • elc2008-grant-likely-fpga.ogg 273.5 MB
[磁力链接] 添加时间:2017-03-06 大小:273.5 MB 最近下载:2025-11-09 热度:3551

[ DevCourseWeb.com ] Udemy - FPGA Embedded Design, Part 3 - EDA Tools.zip

  • [ DevCourseWeb.com ] Udemy - FPGA Embedded Design, Part 3 - EDA Tools.zip 1.2 GB
[磁力链接] 添加时间:2021-05-08 大小:1.2 GB 最近下载:2025-11-12 热度:3399

Learn VHDL, ISE and FPGA by Designing a Basic Home Alarm

  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
  • LEARN_VHDL_ISE_AND_FPGA_BY_DESIGNING.tgz 2.1 GB
[磁力链接] 添加时间:2017-02-14 大小:2.1 GB 最近下载:2025-11-09 热度:3398

[ TutPig.com ] Udemy - Learn VHDL, PLS's and FPGA (Digital Electronic 2)

  • ~Get Your Files Here !/12. Processor Design and its VHDL/1. Simple Processor Design and its VHDL.mp4 489.0 MB
  • ~Get Your Files Here !/5. Multiplexers and Shannon Expansion/1. Multiplexers and Shannon Expansion.mp4 323.1 MB
  • ~Get Your Files Here !/4. VHDL Adders Multiplier Narrated/1. VHDL for adders, Multiplier.mp4 308.1 MB
  • ~Get Your Files Here !/11. VHDL code of the bus design with SWAP operation/1. VHDL code of the bus design with SWAP operation.mp4 238.9 MB
  • ~Get Your Files Here !/3. Half Adders, Full Adders, RCA, CLA/1. HA FA RCA CLA.mp4 209.8 MB
  • ~Get Your Files Here !/7. Conditional statement generate statement/1. Conditional statement, Generate statement, Sequential Assignment, VHDL operators.mp4 205.8 MB
  • ~Get Your Files Here !/6. Decoders Arithmetic Comparator Selected signal assignment/1. Decoders, Arithmetic Comparator, Selected signal assignment.mp4 199.4 MB
  • ~Get Your Files Here !/13. Modelsim/3. Modelsim Tutorial 2.mp4 198.7 MB
  • ~Get Your Files Here !/9. VHDL gated latches flipflops, registers and counter/1. VHDL for Latches, FlipFlops, registers and counters.mp4 166.1 MB
  • ~Get Your Files Here !/10. VHDL parallel load counters and bus design/1. Parallel Load counters and bus design.mp4 163.5 MB
  • ~Get Your Files Here !/1. Introduction/1. Introduction to CAD tools.mp4 152.4 MB
  • ~Get Your Files Here !/13. Modelsim/2. Modelsim Tutorial 1.mp4 134.6 MB
  • ~Get Your Files Here !/8. latches flipflops shift and parallel access registers/1. Latches, FlipFlops, parallel access and shift registers.mp4 122.1 MB
  • ~Get Your Files Here !/2. Numbers Representations & LUTs, PLDs, FPGA/2. LUTs, PLDs, FPGA.mp4 116.6 MB
  • ~Get Your Files Here !/2. Numbers Representations & LUTs, PLDs, FPGA/1. Numbers Representations.mp4 93.2 MB
  • ~Get Your Files Here !/1. Introduction/1.1 Fundamentals Of Digital Logic With VHDL Design 3rd Edition.pdf 12.8 MB
  • ~Get Your Files Here !/4. VHDL Adders Multiplier Narrated/1.1 CENG335 Lecture 2 VHDL Adders Multiplier Narrated.pptx 3.4 MB
  • ~Get Your Files Here !/3. Half Adders, Full Adders, RCA, CLA/1.1 CENG335 Lecture 3 HA FA RCA CLA.pptx 3.0 MB
  • ~Get Your Files Here !/5. Multiplexers and Shannon Expansion/1.1 CENG335 Lecture 4 Multiplexers and Shannon Expansion.pptx 2.6 MB
  • ~Get Your Files Here !/12. Processor Design and its VHDL/1.6 Exercises_set1_solution_part2.pdf 2.5 MB
[磁力链接] 添加时间:2022-01-29 大小:3.2 GB 最近下载:2025-11-11 热度:3273


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