fpga -移花宫 -武林禁地，闲人禁止入内

[ DevCourseWeb.com ] Udemy - FPGA Drive SPI TFT LCD.zip

[ DevCourseWeb.com ] Udemy - FPGA Drive SPI TFT LCD.zip 767.2 MB

[磁力链接] 添加时间:2021-04-27 大小:767.2 MB 最近下载:2025-11-09 热度:1652

elc2008-grant-likely-fpga.ogg

elc2008-grant-likely-fpga.ogg 273.5 MB

[磁力链接] 添加时间:2017-03-06 大小:273.5 MB 最近下载:2025-11-09 热度:3551

National Instruments LabView v8.6 FPGA Module

TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD1.bin 684.1 MB
TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD1.cue 114 Bytes
TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD2.bin 767.6 MB
TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD2.cue 114 Bytes
TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE.nfo 11.7 kB

[磁力链接] 添加时间:2017-02-20 大小:1.5 GB 最近下载:2025-11-07 热度:2308

[FreeTutorials.Us] Udemy - Learn VHDL and FPGA Development

10. Xilinx Tools/1.1 Digilent Inc. - Digital Design Engineer's Source.html 208 Bytes
10. Xilinx Tools/1.2 Xilinx ISE Download.html 158 Bytes
10. Xilinx Tools/1. Xilinx Tools Introduction.mp4 1.4 MB
10. Xilinx Tools/1. Xilinx Tools Introduction.srt 1.3 kB
10. Xilinx Tools/1. Xilinx Tools Introduction.vtt 1.2 kB
10. Xilinx Tools/2. Download the Vivado Tool Suite for the BASYS 3.mp4 38.7 MB
10. Xilinx Tools/2. Download the Vivado Tool Suite for the BASYS 3.srt 9.1 kB
10. Xilinx Tools/2. Download the Vivado Tool Suite for the BASYS 3.vtt 8.0 kB
10. Xilinx Tools/3. ISim VHDL Simulation Tool.mp4 4.9 MB
10. Xilinx Tools/3. ISim VHDL Simulation Tool.srt 2.7 kB
10. Xilinx Tools/3. ISim VHDL Simulation Tool.vtt 2.3 kB
10. Xilinx Tools/4. Xilinx ISE FPGA Development Tool.mp4 9.7 MB
10. Xilinx Tools/4. Xilinx ISE FPGA Development Tool.srt 9.0 kB
10. Xilinx Tools/4. Xilinx ISE FPGA Development Tool.vtt 7.9 kB
10. Xilinx Tools/5. Programming The BASYS 2 FPGA Development Board.mp4 1.9 MB
10. Xilinx Tools/5. Programming The BASYS 2 FPGA Development Board.srt 2.1 kB
10. Xilinx Tools/5. Programming The BASYS 2 FPGA Development Board.vtt 1.8 kB
10. Xilinx Tools/6. Xilinx Tools.html 163 Bytes
11. Lab 1 - Full Adder/1.1 Lab-1.zip.zip 6.9 kB
11. Lab 1 - Full Adder/1. Introduction.mp4 6.0 MB

[磁力链接] 添加时间:2018-09-14 大小:2.1 GB 最近下载:2025-11-07 热度:1496

[ CourseBoat.com ] Udemy - Video Processing with FPGA.zip

[ CourseBoat.com ] Udemy - Video Processing with FPGA.zip 2.8 GB

[磁力链接] 添加时间:2022-02-25 大小:2.8 GB 最近下载:2025-11-07 热度:1639

FPGA Piano

8. One Key Module Coding.mp4 190.6 MB
2. Make Buzzer Buzzing.mp4 184.6 MB
9. One Key Module Simulation.mp4 128.6 MB
6. Buzzer Module Simulation.mp4 108.1 MB
5. Buzzer Module Coding.mp4 101.6 MB
12. Key Module Solution2 Coding.mp4 88.4 MB
11. Key Module Solution1 Simultion.mp4 87.2 MB
10. Key Module Solution1 Coding.mp4 74.9 MB
16. LED Module Simulation.mp4 71.6 MB
19. Run on Board.mp4 66.7 MB
18. Top Module Simulation.mp4 66.7 MB
17. Top Module Coding.mp4 59.1 MB
1. System Target.mp4 57.9 MB
15. LED Module Coding.mp4 48.3 MB
7. Key Module Status Machine.mp4 33.3 MB
13. Key Module Solution2 Simulation.mp4 23.1 MB
4. Buzzer Module Status Machine.mp4 18.1 MB
3. System Analysis.mp4 15.4 MB
14. LED Module Status Machine.mp4 10.1 MB
8. One Key Module Coding.srt 31.9 kB

[磁力链接] 添加时间:2023-12-18 大小:1.4 GB 最近下载:2025-11-04 热度:2767

[ FreeCourseWeb.com ] Udemy - FPGA Image Processing.zip

[ FreeCourseWeb.com ] Udemy - FPGA Image Processing.zip 1.9 GB

[磁力链接] 添加时间:2021-05-09 大小:1.9 GB 最近下载:2025-11-04 热度:2108

[ FreeCourseWeb.com ] Udemy - FPGA Design with MATLAB & Simulink

~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/1. Section 4 Advance Design with HDL Coder Overview.mp4 162.5 MB
~Get Your Files Here !/3. Section_3 Project with System Generator/2. Section 3 Lab 30 Basic Project with System Generator.mp4 122.9 MB
~Get Your Files Here !/1. Section_1 Installation of MatlabSimulink and VIVADOISE/1. Installation of MatlabSimulink and VIVADOISE.mp4 74.3 MB
~Get Your Files Here !/6. Section_6 Zynq Development with System Generator & VIVADO/1. ZedBoard XADC+ Pmod Interfacing and Implementation on System Generator.mp4 65.7 MB
~Get Your Files Here !/3. Section_3 Project with System Generator/1. Section_3 Basic Project with System Generator Overview.mp4 58.3 MB
~Get Your Files Here !/2. Section_2 Introduction to HDL Coder and System Generator/1. Introduction to HDL Coder and System Generator Part I.mp4 55.8 MB
~Get Your Files Here !/1. Section_1 Installation of MatlabSimulink and VIVADOISE/2. Section 1 Lab 1 Basic Design with Simulink Environment.mp4 51.2 MB
~Get Your Files Here !/2. Section_2 Introduction to HDL Coder and System Generator/2. Introduction to HDL Coder and System Generator Part II.mp4 39.1 MB
~Get Your Files Here !/5. Section_5 Advanced Design with System Generator/1. Lab 51 FIR Filter Design.mp4 34.3 MB
~Get Your Files Here !/3. Section_3 Project with System Generator/3. Lab 31 Basic FFT Design with System Generator.mp4 33.1 MB
~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/2. LMS Filter Design_Advance Design with HDL Coder.mp4 29.4 MB
~Get Your Files Here !/5. Section_5 Advanced Design with System Generator/2. OFDM Transceiver Design and Simulation Part I Transmitter Section.mp4 19.5 MB
~Get Your Files Here !/3. Section_3 Project with System Generator/4. Lab 32 Creating Custom JTAG Configuration.mp4 18.7 MB
~Get Your Files Here !/5. Section_5 Advanced Design with System Generator/3. OFDM Transceiver Design and Simulation Part II Receiver Section & Simulation.mp4 18.6 MB
~Get Your Files Here !/3. Section_3 Project with System Generator/5. (Optional) Section_3 Lab 32 Demo JTAG Implementation on Spartan 3E from Sys Gen.mp4 11.1 MB
~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/hdl_coder_lms/original_speech.wav 4.0 MB
~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/Section-4-Advance-Design-with-HDL-Coder-with-installation-V2.pdf 3.2 MB
~Get Your Files Here !/2. Section_2 Introduction to HDL Coder and System Generator/Section-2-V2-Introduction-to-HDL-Coder-and-System-Generator.pdf 2.0 MB
~Get Your Files Here !/3. Section_3 Project with System Generator/Section-3-Basic-Project-with-System-Genrator-V2.pdf 1.3 MB
~Get Your Files Here !/1. Section_1 Installation of MatlabSimulink and VIVADOISE/Section-1-V2-Installing-Tools-Matlab-Simulink-and-ISE-VIVADO.pdf 1.1 MB

[磁力链接] 添加时间:2022-04-18 大小:806.4 MB 最近下载:2025-11-03 热度:2218

[ DevCourseWeb.com ] Udemy - Hands-on development of cpu- soc on FPGA using vhdl(verilog)

~Get Your Files Here !/18 -888.mp4 461.5 MB
~Get Your Files Here !/14 -how to control memory operation, register operation, alu operation etc.mp4 304.8 MB
~Get Your Files Here !/6 -Extracting instruction set from RISC-V datasheet.mp4 261.9 MB
~Get Your Files Here !/8 -how to setup the read and write register alias table.mp4 203.3 MB
~Get Your Files Here !/7 -introducing the counter-track out-of-order execution.mp4 176.0 MB
~Get Your Files Here !/17 -the cache control.mp4 171.0 MB
~Get Your Files Here !/16 -how to setup the cache control for hit, miss, cache address and memory address.mp4 150.4 MB
~Get Your Files Here !/15 -how control handles cache misses and cache hit.mp4 128.1 MB
~Get Your Files Here !/13 -how to connect different units using the control.mp4 127.9 MB
~Get Your Files Here !/19 -top wiring and conclusion.mp4 110.6 MB
~Get Your Files Here !/3 -accessing resource file.mp4 110.4 MB
~Get Your Files Here !/9 -feedback how to return registers after instruction exec using output buffers.mp4 101.4 MB
~Get Your Files Here !/5 -how to link program memory to instruction buffer and program counter buffer.mp4 86.8 MB
~Get Your Files Here !/11 -architecture of a register bank.mp4 72.5 MB
~Get Your Files Here !/12 -how to handle multiple function units. introducing memory buffers.mp4 54.7 MB
~Get Your Files Here !/10 -How to design a simple ALU.mp4 49.2 MB
~Get Your Files Here !/2 -Architecture of the design.mp4 47.9 MB
~Get Your Files Here !/4 -How to design the program memory.mp4 39.5 MB
~Get Your Files Here !/1 -Introduction.mp4 21.2 MB
~Get Your Files Here !/3 -class_resources.zip 11.6 MB

[磁力链接] 添加时间:2025-02-13 大小:2.7 GB 最近下载:2025-11-02 热度:1945

FPGA Advantage 8.1

Keygen/Mentor.kg.02.03.09.rar 873.4 kB
fa.exe 643.2 MB
READMEPC.TXT 4.8 kB

[磁力链接] 添加时间:2017-02-10 大小:644.1 MB 最近下载:2025-10-31 热度:922

[ DevCourseWeb.com ] Udemy - Verilog on Intel (Altera) FPGA.zip

[ DevCourseWeb.com ] Udemy - Verilog on Intel (Altera) FPGA.zip 3.1 GB

[磁力链接] 添加时间:2021-03-14 大小:3.1 GB 最近下载:2025-10-30 热度:3002

[CourserHub.com] Coursera - FPGA Design for Embedded Systems Specialization

[CourserHub.com] Coursera - FPGA Design for Embedded Systems Specialization.part1.rar 1.4 GB
[CourserHub.com] Coursera - FPGA Design for Embedded Systems Specialization.part2.rar 1.2 GB