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[ FreeCourseWeb.com ] Udemy - VLSI Digital Design using Verilog and hardware- Handson_temp.zip

  • [ FreeCourseWeb.com ] Udemy - VLSI Digital Design using Verilog and hardware- Handson_temp.zip 8.6 GB
[磁力链接] 添加时间:2021-04-19 大小:8.6 GB 最近下载:2025-03-07 热度:1661

VLSI

  • Lecture - 1 Introduction on VLSI Design.flv.mp3 109.8 MB
  • Lecture - 11 Oxidation I - Kinetics of Oxidation.flv 121.9 MB
  • Lecture - 12 Oxidation II Oxidation rate constants.flv 124.1 MB
  • Lecture - 13 Oxidation III - Dopant Redistribution.flv 120.4 MB
  • Lecture - 14 Oxidation IV - Oxide Charges.flv 106.3 MB
  • Lecture - 15 Diffusion I - Theory of Diffusion.flv 133.6 MB
  • Lecture - 16 Diffusion II - Infinite Source.flv 104.6 MB
  • Lecture - 17 diffusion III.flv 123.8 MB
  • Lecture - 18 Diffusion IV Diffusion Systems.flv 135.5 MB
  • Lecture - 19 Ion - Implantation Process.flv 136.8 MB
  • Lecture - 2 Bipolar Junction Transistor Fabrication.flv 111.6 MB
  • Lecture - 20 Ion - Implantation Process.flv 127.2 MB
  • Lecture - 21 Annealing of Damages.mp4 125.2 MB
  • Lecture - 22 Masking during Implantation.mp4 130.2 MB
  • Lecture - 23 Lithography - I.mp4 132.2 MB
  • Lecture - 24 Lithography - II.mp4 93.1 MB
  • Lecture - 25 Wet Chemical Etching.mp4 132.3 MB
  • Lecture - 26 Dry Etching.mp4 122.8 MB
  • Lecture - 27 Plasma Etching Systems.mp4 123.2 MB
  • Lecture - 28 Etching of Si,Sio2,SiN and other materials.mp4 130.1 MB
[磁力链接] 添加时间:2017-04-17 大小:4.5 GB 最近下载:2025-03-07 热度:1650

[ DevCourseWeb.com ] Udemy - VLSI, PLC, Microcontrollers, and Assembly Language

  • ~Get Your Files Here !/20. Computer Systems/1. Computer Systems.mp4 303.4 MB
  • ~Get Your Files Here !/17. Introduction to Microcontrollers/1. Introduction to Microcontrollers.mp4 251.9 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/1. MSP430 Microcontroller - part 1.mp4 245.0 MB
  • ~Get Your Files Here !/1. CMOS Technology/1. CMOS Technology.mp4 219.3 MB
  • ~Get Your Files Here !/8. Assembly Language Fundamentals/1. Assembly Language Fundamentals.mp4 204.8 MB
  • ~Get Your Files Here !/12. Advanced Procedures, Strings, Arrays/1. Advanced Procedures, Strings, Arrays.mp4 179.9 MB
  • ~Get Your Files Here !/15. High Level Language Interface and 16-bit MS DOS Programming/1. High Level Language Interface and 16-bit MS DOS Programming.mp4 174.7 MB
  • ~Get Your Files Here !/3. Basics of PLC/1. Basics of PLC.mp4 143.4 MB
  • ~Get Your Files Here !/7. Assembly Language for Intel based Computers/1. Assembly Language for Intel based Computers.mp4 143.1 MB
  • ~Get Your Files Here !/14. 32-bit Windows Programming/1. 32-bit Windows Programming.mp4 142.0 MB
  • ~Get Your Files Here !/5. Ladder Diagram/1. Ladder Diagram.mp4 139.4 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/3. MSP430 Microcontroller - part 3.mp4 138.8 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/4. MSP430 Microcontroller - part 4.mp4 127.6 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/2. MSP430 Microcontroller - part 2.mp4 126.9 MB
  • ~Get Your Files Here !/19. AVR Microcontroller/1. AVR Microcontroller.mp4 120.5 MB
  • ~Get Your Files Here !/10. Conditional Processing/1. Conditional Processing.mp4 114.0 MB
  • ~Get Your Files Here !/11. Integer Arithmetic/1. Integer Arithmetic.mp4 110.9 MB
  • ~Get Your Files Here !/2. VLSI Introduction/1. VLSI Introduction.mp4 92.7 MB
  • ~Get Your Files Here !/9. Procedures/1. Procedures.mp4 78.9 MB
  • ~Get Your Files Here !/16. Disk Usage/1. Disk Usage.mp4 73.8 MB
[磁力链接] 添加时间:2022-01-31 大小:3.3 GB 最近下载:2025-03-13 热度:3000

[ FreeCourseWeb.com ] Udemy - VSDOpen2018 - First ever online VLSI conference.zip

  • [ FreeCourseWeb.com ] Udemy - VSDOpen2018 - First ever online VLSI conference.zip 3.0 GB
[磁力链接] 添加时间:2021-03-06 大小:3.0 GB 最近下载:2025-02-24 热度:1190

[ DevCourseWeb.com ] Udemy - VLSI - Essential concepts and detailed interview guide

  • ~Get Your Files Here !/01 - Physical Design Flow Overview/004 Route - DRC Clean - Parasitics Extraction - Final STA.mp4 111.2 MB
  • ~Get Your Files Here !/16 - Routing And Design Rule Check (DRC)/002 Design Rule Check.mp4 104.3 MB
  • ~Get Your Files Here !/03 - Placement/002 Optimize Placement Using Estimated Wire Length And Capacitance.mp4 95.8 MB
  • ~Get Your Files Here !/16 - Routing And Design Rule Check (DRC)/001 Introduction To Maze Routing - Lee's Algorithm.mp4 92.5 MB
  • ~Get Your Files Here !/03 - Placement/003 Optimize Placement Continued.mp4 91.2 MB
  • ~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/004 Data Slew Check.mp4 86.9 MB
  • ~Get Your Files Here !/17 - Parasitics Extraction/001 Introduction To IEEE 1481-1999 SPEF Format.mp4 82.4 MB
  • ~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/003 Multiple Clock Timing Analysis And Introduction To Data Slew Check.mp4 76.4 MB
  • ~Get Your Files Here !/15 - Noise Protection Technique/003 Drive Strength.mp4 70.9 MB
  • ~Get Your Files Here !/01 - Physical Design Flow Overview/002 Netlist Binding And Placement Optimization.mp4 68.7 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/004 H-Tree Clock Buffers And Pulse Width Check.mp4 68.6 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/003 CMOS Inverter PMOSNMOS Matching Switching Resistance Solution.mp4 66.8 MB
  • ~Get Your Files Here !/01 - Physical Design Flow Overview/003 Clock Net Shielding.mp4 65.8 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/001 H-Tree Buffering Observations.mp4 63.4 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/005 Dynamic Power And Short Circuit Power.mp4 61.1 MB
  • ~Get Your Files Here !/11 - Introduction To Crosstalk - Why and How Crosstalk occurs in a CHIP/002 Dominant Lateral Capacitance.mp4 60.0 MB
  • ~Get Your Files Here !/10 - Static Timing Analysis With Real Clocks/003 Impact Of Unbalanced Skew On Hold Time.mp4 58.5 MB
  • ~Get Your Files Here !/06 - H-Tree/003 H-Tree Latency And Power Check.mp4 58.3 MB
  • ~Get Your Files Here !/10 - Static Timing Analysis With Real Clocks/002 Impact Of Unbalanced Skew On Setup Time.mp4 55.3 MB
  • ~Get Your Files Here !/06 - H-Tree/002 H-Tree Pulse Width And Duty Cycle Check.mp4 50.8 MB
[磁力链接] 添加时间:2024-01-13 大小:2.9 GB 最近下载:2025-03-14 热度:1333

[ FreeCourseWeb.com ] Udemy - Become Zero to Hero in vlsi design [comprehensive video].zip

  • [ FreeCourseWeb.com ] Udemy - Become Zero to Hero in vlsi design [comprehensive video].zip 2.9 GB
[磁力链接] 添加时间:2021-04-09 大小:2.9 GB 最近下载:2025-03-08 热度:835

ASIC Bootcamp for VLSI Engineer- STA Basic Concepts

  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/3. Delay Calculation/1. Delay Calculation.mp4 595.3 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/5. Timing Verification/1. Timing Verification.mp4 581.4 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/4. Constraints Develop/1. Constraints Develop.mp4 430.7 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/6. Special Timing Checks/1. Special Timing Checks.mp4 323.2 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/2. STA Definition/1. What is STA.mp4 305.7 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/9. Sign-off Checklist/1. Sign-off Checklist.mp4 158.8 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/8. STA Methodology/1. STA Methodology.mp4 157.4 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/7. Crosstalk & Noise/1. Crosstalk & Noise.mp4 106.8 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/1. Introduction/1. Course Information.mp4 90.3 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/5. Timing Verification/2.1 Chapter 4.pptx.pptx 2.6 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/3. Delay Calculation/2.1 Chapter 2.pptx.pptx 2.6 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/6. Special Timing Checks/2.1 Chapter 5.pptx.pptx 2.5 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/4. Constraints Develop/2.1 Chapter 3.pptx.pptx 2.1 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/10. Resources/1.1 STA Basic Concepts.pdf.pdf 1.3 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/2. STA Definition/2.1 Chapter 1.pptx.pptx 1.1 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/8. STA Methodology/2.1 Chapter 7.pptx.pptx 642.2 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/7. Crosstalk & Noise/2.1 Chapter 6.pptx.pptx 318.2 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/9. Sign-off Checklist/2.1 Chapter 8.pptx.pptx 112.7 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/1. Introduction/1.2 Chapter 0.pptx.pptx 95.3 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/1. Introduction/1.1 Resume Template.docx.docx 27.1 kB
[磁力链接] 添加时间:2022-01-17 大小:2.8 GB 最近下载:2025-02-25 热度:740

ASIC Bootcamp for VLSI Engineer STA Basic Concepts [UdemyCourseDownloader]

  • 03. Delay Calculation/1. Delay Calculation.mp4 595.3 MB
  • 05. Timing Verification/1. Timing Verification.mp4 581.4 MB
  • 04. Constraints Develop/1. Constraints Develop.mp4 430.7 MB
  • 06. Special Timing Checks/1. Special Timing Checks.mp4 323.2 MB
  • 02. STA Definition/1. What is STA.mp4 305.7 MB
  • 09. Sign-off Checklist/1. Sign-off Checklist.mp4 158.8 MB
  • 08. STA Methodology/1. STA Methodology.mp4 157.4 MB
  • 07. Crosstalk & Noise/1. Crosstalk & Noise.mp4 106.8 MB
  • 01. Introduction/1. Course Information.mp4 90.3 MB
  • 05. Timing Verification/2.1 Chapter 4.pptx.pptx 2.6 MB
  • 03. Delay Calculation/2.1 Chapter 2.pptx.pptx 2.6 MB
  • 06. Special Timing Checks/2.1 Chapter 5.pptx.pptx 2.5 MB
  • 04. Constraints Develop/2.1 Chapter 3.pptx.pptx 2.1 MB
  • 10. Resources/1.1 STA Basic Concepts.pdf.pdf 1.3 MB
  • 02. STA Definition/2.1 Chapter 1.pptx.pptx 1.1 MB
  • 08. STA Methodology/2.1 Chapter 7.pptx.pptx 642.2 kB
  • 07. Crosstalk & Noise/2.1 Chapter 6.pptx.pptx 318.2 kB
  • 09. Sign-off Checklist/2.1 Chapter 8.pptx.pptx 112.7 kB
  • 01. Introduction/1.2 Chapter 0.pptx.pptx 95.3 kB
  • 01. Introduction/1.1 Resume Template.docx.docx 27.1 kB
[磁力链接] 添加时间:2021-05-12 大小:2.8 GB 最近下载:2025-03-12 热度:1085

[ FreeCourseWeb.com ] Udemy - ASIC Bootcamp for VLSI Engineer- STA Basic Concepts (Updated 1-2020).zip

  • [ FreeCourseWeb.com ] Udemy - ASIC Bootcamp for VLSI Engineer- STA Basic Concepts (Updated 1-2020).zip 2.3 GB
[磁力链接] 添加时间:2021-03-30 大小:2.3 GB 最近下载:2025-03-13 热度:3277

[ FreeCourseWeb.com ] Udemy - VSDOpen2020 - VLSI online conference.zip

  • [ FreeCourseWeb.com ] Udemy - VSDOpen2020 - VLSI online conference.zip 2.2 GB
[磁力链接] 添加时间:2021-03-28 大小:2.2 GB 最近下载:2025-03-10 热度:1237

coursera-vlsi-cad-logic-to-layout

  • Lectures/11_Tools/03_Espresso_Tutorial_Video_3-06.txt 2.6 kB
  • Lectures/11_Tools/03_Espresso_Tutorial_Video_3-06.srt 4.1 kB
  • Lectures/11_Tools/03_Espresso_Tutorial_Video_3-06.mp4 5.3 MB
  • Lectures/11_Tools/02_MiniSat_Tutorial_Video_6-11.txt 5.2 kB
  • Lectures/11_Tools/02_MiniSat_Tutorial_Video_6-11.srt 7.9 kB
  • Lectures/11_Tools/02_MiniSat_Tutorial_Video_6-11.mp4 10.1 MB
  • Lectures/11_Tools/01_KBDD_Tutorial_Video_5-20.txt 4.2 kB
  • Lectures/11_Tools/01_KBDD_Tutorial_Video_5-20.srt 6.3 kB
  • Lectures/11_Tools/01_KBDD_Tutorial_Video_5-20.mp4 7.3 MB
  • Lectures/01_Orientation/01_Course_Promo_Video.mp4 2.7 MB
  • Assignements/Final Exam/0_Final_Exam.png 1.4 MB
  • Lectures/04_BDDs_SAT_Week_2/02_Lecture_3.2-_BDD_Basics_Part_2_16-51.srt 22.3 kB
  • Lectures/04_BDDs_SAT_Week_2/04_Lecture_3.4-_BDD_Ordering_28-12.txt 25.5 kB
  • Lectures/04_BDDs_SAT_Week_2/07_Lecture_4.3-_Sat_For_Logic_25-45.mp4 30.1 MB
  • Lectures/04_BDDs_SAT_Week_2/06_Lecture_4.2-_Sat_Part_2_17-56.txt 16.6 kB
  • Lectures/04_BDDs_SAT_Week_2/06_Lecture_4.2-_Sat_Part_2_17-56.srt 25.4 kB
  • Lectures/04_BDDs_SAT_Week_2/06_Lecture_4.2-_Sat_Part_2_17-56.mp4 23.4 MB
  • Lectures/04_BDDs_SAT_Week_2/05_Lecture_4.1-_SAT_Part_1_13-51.txt 14.0 kB
  • Lectures/04_BDDs_SAT_Week_2/05_Lecture_4.1-_SAT_Part_1_13-51.srt 21.1 kB
  • Lectures/04_BDDs_SAT_Week_2/05_Lecture_4.1-_SAT_Part_1_13-51.mp4 19.4 MB
[磁力链接] 添加时间:2017-02-26 大小:1.4 GB 最近下载:2025-03-13 热度:5235

[ DevCourseWeb.com ] Udemy - Digital Timing Basics For Vlsi Interview and Soc Design

  • ~Get Your Files Here !/7 - Frequency vs Voltage in SoC/30 - FV Curve Explanation.mp4 69.2 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/15 - Setup Violation Fix Clock Path Delay.mp4 56.2 MB
  • ~Get Your Files Here !/3 - Static Timing Foundation/12 - Example for Setup & Hold Condition.mp4 50.0 MB
  • ~Get Your Files Here !/9 - Practical Design Issue 2 Max & Min Frequency of Operation/38 - Maximum Frequency of Operation with Clock Skew.mp4 40.1 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/23 - Clock Gating Setup & Hold Time.mp4 39.6 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/21 - Positive Latch Setup & Hold Time.mp4 38.3 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/24 - Negative Hold Time for Flop.mp4 36.7 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/19 - Latency Reduction with Optimized Design.mp4 36.6 MB
  • ~Get Your Files Here !/3 - Static Timing Foundation/11 - Hold Time Condition in Cycle Path.mp4 32.2 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/18 - Good Margin but Higher Latency.mp4 31.8 MB
  • ~Get Your Files Here !/1 - Introduction/1 - Introduction.mp4 31.0 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/25 - Negative Setup Time for Flop.mp4 27.6 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/14 - Setup Violation.mp4 25.7 MB
  • ~Get Your Files Here !/3 - Static Timing Foundation/10 - Setup Time Condition in Cycle Path.mp4 25.2 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/22 - Negative Latch Setup & Hold Time.mp4 24.9 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/17 - Hold Violation Fix Data Path Delay.mp4 20.0 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/13 - Setup & Hold Margin Computation.mp4 19.7 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/20 - Design Issues in Real World SoC.mp4 19.0 MB
  • ~Get Your Files Here !/8 - Practical Design Issue1 Multiple Parallel Paths/33 - Multiple Path Hold Time Analysis.mp4 18.6 MB
  • ~Get Your Files Here !/8 - Practical Design Issue1 Multiple Parallel Paths/32 - Multiple Path Setup Time Analysis.mp4 18.2 MB
[磁力链接] 添加时间:2024-01-05 大小:865.9 MB 最近下载:2025-03-14 热度:1559

[ FreeCourseWeb.com ] Udemy - VLSI - Design For Test (DFT)- JTAG, Boundary SCAN and IJTAG.zip

  • [ FreeCourseWeb.com ] Udemy - VLSI - Design For Test (DFT)- JTAG, Boundary SCAN and IJTAG.zip 544.4 MB
[磁力链接] 添加时间:2021-05-19 大小:544.4 MB 最近下载:2025-03-13 热度:1428

VLSI Academy - Clock Tree Synthesis

  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
  • VLSI Academy - Clock Tree Synthesis.tgz 494.6 MB
[磁力链接] 添加时间:2017-06-12 大小:494.6 MB 最近下载:2025-03-09 热度:1386

VLSI Academy - Circuit Design & SPICE Simulations

  • VLSI Academy - Circuit Design & SPICE Simulations.tgz 409.1 MB
  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
[磁力链接] 添加时间:2017-04-19 大小:409.1 MB 最近下载:2025-03-02 热度:632

Monolake - VLSI (2016) FLAC

  • Monolake - Geometry Engine.flac 48.9 MB
  • Monolake - Glypnir.flac 40.6 MB
  • Monolake - Pio.flac 37.1 MB
  • Monolake - LogC.flac 34.8 MB
  • Monolake - Dystopia.flac 33.8 MB
  • Monolake - Crash.flac 32.6 MB
  • Monolake - Unit.flac 31.5 MB
  • Monolake - Nmos.flac 30.0 MB
  • Monolake - Arit.flac 22.7 MB
  • Monolake - Inwards.flac 19.8 MB
  • Monolake - Error.flac 18.3 MB
  • cover.jpg 1.8 MB
  • folder.jpg 448.1 kB
  • Folder.auCDtect.txt 4.8 kB
  • foo_DR12.txt 1.3 kB
[磁力链接] 添加时间:2017-04-20 大小:352.4 MB 最近下载:2025-03-13 热度:745

Monolake - VLSI (2016)(FLAC)(CD)

  • Monolake - VLSI.m3u 680 Bytes
  • VLSI.cue 1.8 kB
  • Monolake - VLSI.log 11.1 kB
  • 07 - Monolake - Error.flac 18.3 MB
  • 02 - Monolake - Inwards.flac 19.8 MB
  • 01 - Monolake - Arit.flac 22.7 MB
  • 10 - Monolake - Nmos.flac 30.0 MB
  • 09 - Monolake - Unit.flac 31.5 MB
  • 03 - Monolake - Crash.flac 32.6 MB
  • 08 - Monolake - Dystopia.flac 33.8 MB
  • 04 - Monolake - LogC.flac 34.8 MB
  • 06 - Monolake - Pio.flac 37.1 MB
  • 11 - Monolake - Glypnir.flac 40.6 MB
  • 05 - Monolake - Geometry Engine.flac 48.9 MB
[磁力链接] 添加时间:2017-02-10 大小:350.1 MB 最近下载:2025-03-14 热度:1343

Lextron - 2024 - Electromagnetic [WEB, VLSI Records, VLSI23]

  • 05. Mind Your Head.flac 39.5 MB
  • 07. Heart Lights.flac 35.9 MB
  • 01. Magnetic Travel.flac 35.4 MB
  • 02. Visitations.flac 35.1 MB
  • 08. Jaunt.flac 29.2 MB
  • 06. Into the Sky.flac 27.0 MB
  • 04. Vortex.flac 26.0 MB
  • 03. Dream State.flac 25.4 MB
  • front.jpg 9.0 MB
  • cover.jpg 266.4 kB
[磁力链接] 添加时间:2025-02-11 大小:262.8 MB 最近下载:2025-03-13 热度:162

[ FreeCourseWeb.com ] Udemy - VLSI Course Series - FPGA Architecture Basics.zip

  • [ FreeCourseWeb.com ] Udemy - VLSI Course Series - FPGA Architecture Basics.zip 258.6 MB
[磁力链接] 添加时间:2021-04-01 大小:258.6 MB 最近下载:2025-03-13 热度:933

Monolake-VLSI-(ML-032)-WEB-2016-MOHAWK

  • 00-monolake-vlsi-(ml-032)-web-2016.jpg 90.6 kB
  • 00-monolake-vlsi-(ml-032)-web-2016.m3u 517 Bytes
  • 00-monolake-vlsi-(ml-032)-web-2016.nfo 1.1 kB
  • 00-monolake-vlsi-(ml-032)-web-2016.sfv 627 Bytes
  • 01-monolake-arit_(vlsi_version)-aade5c1d.mp3 12.4 MB
  • 02-monolake-inwards_(vlsi_version)-dd349e36.mp3 11.2 MB
  • 03-monolake-crash_(vlsi_version)-f18beeb6.mp3 16.2 MB
  • 04-monolake-logc_(vlsi_version)-40551331.mp3 20.8 MB
  • 05-monolake-geometry_engine_(vlsi_version)-f3a6c603.mp3 20.1 MB
  • 06-monolake-pio_(vlsi_version)-6df297b3.mp3 14.8 MB
  • 07-monolake-error_(vlsi_version)-40bc53b9.mp3 10.5 MB
  • 08-monolake-dystopia_(vlsi_version)-b1b65742.mp3 14.9 MB
  • 09-monolake-unit_(vlsi_version)-9043167f.mp3 15.0 MB
  • 10-monolake-nmos_(vlsi_version)-2dc86173.mp3 14.9 MB
  • 11-monolake-glypnir_(vlsi_version)-a4e4f329.mp3 19.0 MB
[磁力链接] 添加时间:2017-02-14 大小:169.7 MB 最近下载:2025-02-24 热度:497


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