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[ CourseMega.com ] Digital Integrated Circuit Design - From VLSI Architectures to CMOS Fabrication (Solution Manual, Solutions)

  • ~Get Your Files Here !/Lectures/Physical_Design.pdf 14.5 MB
  • ~Get Your Files Here !/Lectures/19-Physical_Design.pdf 13.1 MB
  • ~Get Your Files Here !/Lectures/Introduction_to_Microelectronics.pdf 10.3 MB
  • ~Get Your Files Here !/Lectures/A_Primer_on_CMOS_Technology.pdf 7.1 MB
  • ~Get Your Files Here !/Lectures/From_Algorithms_to_Architectures.pdf 6.2 MB
  • ~Get Your Files Here !/Lectures/Functional_Verification.pdf 5.4 MB
  • ~Get Your Files Here !/Lectures/14-Outlook.pdf 3.9 MB
  • ~Get Your Files Here !/Lectures/17-Gate-_and_Transistor-Level_Design.pdf 3.4 MB
  • ~Get Your Files Here !/Lectures/Gate-_and_Transistor-Level_Design.pdf 3.0 MB
  • ~Get Your Files Here !/Lectures/Outlook.pdf 2.9 MB
  • ~Get Your Files Here !/Lectures/Modelling_Hardware_with_VHDL.pdf 2.9 MB
  • ~Get Your Files Here !/Lectures/15-VLSI_Economics_and_Project_Management.pdf 2.6 MB
  • ~Get Your Files Here !/Lectures/16-Energy_Efficiency_and_Heat_Removal.pdf 2.3 MB
  • ~Get Your Files Here !/Lectures/Energy_Efficiency_and_Heat_Removal.pdf 2.1 MB
  • ~Get Your Files Here !/Lectures/VLSI_Economics_and_Project_Management.pdf 2.1 MB
  • ~Get Your Files Here !/Lectures/20-Clocking_of_Synchronous_Circuits.pdf 1.9 MB
  • ~Get Your Files Here !/Solutions/Solutions.pdf 1.7 MB
  • ~Get Your Files Here !/Lectures/Clocking_of_Synchronous_Circuits.pdf 1.6 MB
  • ~Get Your Files Here !/Lectures/21-Acquisition_of_Asynchronous_Data.pdf 1.3 MB
  • ~Get Your Files Here !/Lectures/Acquisition_of_Asynchronous_Data.pdf 1.1 MB
[磁力链接] 添加时间:2024-08-04 大小:94.3 MB 最近下载:2024-11-30 热度:230

[ CourseWikia.com ] Nanoscale VLSI - Devices, Circuits and Applications

  • ~Get Your Files Here !/9811579369.epub 70.0 MB
  • ~Get Your Files Here !/9811579369.pdf 16.7 MB
  • ~Get Your Files Here !/Bonus Resources.txt 386 Bytes
  • Get Bonus Downloads Here.url 181 Bytes
[磁力链接] 添加时间:2024-02-02 大小:86.7 MB 最近下载:2024-11-26 热度:496

[ CourseWikia.com ] A Practical Approach to VLSI System on Chip (SoC) Design - A Comprehensive Guide, 2nd Edition

  • ~Get Your Files Here !/A Practical Approach to VLSI System on Chip (SoC) Design.epub 53.5 MB
  • ~Get Your Files Here !/A Practical Approach to VLSI System on Chip (SoC) Design.pdf 16.5 MB
  • ~Get Your Files Here !/Bonus Resources.txt 386 Bytes
  • Get Bonus Downloads Here.url 181 Bytes
[磁力链接] 添加时间:2024-01-26 大小:70.0 MB 最近下载:2024-11-21 热度:733

Sze S. VLSI technology 1983

  • Sze S. VLSI technology 1983.pdf 115.1 MB
[磁力链接] 添加时间:2024-01-23 大小:115.1 MB 最近下载:2024-11-29 热度:910

[ DevCourseWeb.com ] Udemy - VLSI - Essential concepts and detailed interview guide

  • ~Get Your Files Here !/01 - Physical Design Flow Overview/004 Route - DRC Clean - Parasitics Extraction - Final STA.mp4 111.2 MB
  • ~Get Your Files Here !/16 - Routing And Design Rule Check (DRC)/002 Design Rule Check.mp4 104.3 MB
  • ~Get Your Files Here !/03 - Placement/002 Optimize Placement Using Estimated Wire Length And Capacitance.mp4 95.8 MB
  • ~Get Your Files Here !/16 - Routing And Design Rule Check (DRC)/001 Introduction To Maze Routing - Lee's Algorithm.mp4 92.5 MB
  • ~Get Your Files Here !/03 - Placement/003 Optimize Placement Continued.mp4 91.2 MB
  • ~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/004 Data Slew Check.mp4 86.9 MB
  • ~Get Your Files Here !/17 - Parasitics Extraction/001 Introduction To IEEE 1481-1999 SPEF Format.mp4 82.4 MB
  • ~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/003 Multiple Clock Timing Analysis And Introduction To Data Slew Check.mp4 76.4 MB
  • ~Get Your Files Here !/15 - Noise Protection Technique/003 Drive Strength.mp4 70.9 MB
  • ~Get Your Files Here !/01 - Physical Design Flow Overview/002 Netlist Binding And Placement Optimization.mp4 68.7 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/004 H-Tree Clock Buffers And Pulse Width Check.mp4 68.6 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/003 CMOS Inverter PMOSNMOS Matching Switching Resistance Solution.mp4 66.8 MB
  • ~Get Your Files Here !/01 - Physical Design Flow Overview/003 Clock Net Shielding.mp4 65.8 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/001 H-Tree Buffering Observations.mp4 63.4 MB
  • ~Get Your Files Here !/08 - Buffered H-Tree/005 Dynamic Power And Short Circuit Power.mp4 61.1 MB
  • ~Get Your Files Here !/11 - Introduction To Crosstalk - Why and How Crosstalk occurs in a CHIP/002 Dominant Lateral Capacitance.mp4 60.0 MB
  • ~Get Your Files Here !/10 - Static Timing Analysis With Real Clocks/003 Impact Of Unbalanced Skew On Hold Time.mp4 58.5 MB
  • ~Get Your Files Here !/06 - H-Tree/003 H-Tree Latency And Power Check.mp4 58.3 MB
  • ~Get Your Files Here !/10 - Static Timing Analysis With Real Clocks/002 Impact Of Unbalanced Skew On Setup Time.mp4 55.3 MB
  • ~Get Your Files Here !/06 - H-Tree/002 H-Tree Pulse Width And Duty Cycle Check.mp4 50.8 MB
[磁力链接] 添加时间:2024-01-13 大小:2.9 GB 最近下载:2024-11-28 热度:947

Nandan D. VLSI Architecture for Signal,Speech,..Image Proc. 2023

  • Nandan D. VLSI Architecture for Signal,Speech,..Image Proc. 2023.pdf 40.1 MB
[磁力链接] 添加时间:2024-01-07 大小:40.1 MB 最近下载:2024-11-29 热度:369

Kumar A. Machine Learning Techniques for VLSI Chip Design 2023

  • Kumar A. Machine Learning Techniques for VLSI Chip Design 2023.pdf 41.2 MB
[磁力链接] 添加时间:2024-01-06 大小:41.2 MB 最近下载:2024-11-29 热度:1461

[ DevCourseWeb.com ] Udemy - Digital Timing Basics For Vlsi Interview and Soc Design

  • ~Get Your Files Here !/7 - Frequency vs Voltage in SoC/30 - FV Curve Explanation.mp4 69.2 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/15 - Setup Violation Fix Clock Path Delay.mp4 56.2 MB
  • ~Get Your Files Here !/3 - Static Timing Foundation/12 - Example for Setup & Hold Condition.mp4 50.0 MB
  • ~Get Your Files Here !/9 - Practical Design Issue 2 Max & Min Frequency of Operation/38 - Maximum Frequency of Operation with Clock Skew.mp4 40.1 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/23 - Clock Gating Setup & Hold Time.mp4 39.6 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/21 - Positive Latch Setup & Hold Time.mp4 38.3 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/24 - Negative Hold Time for Flop.mp4 36.7 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/19 - Latency Reduction with Optimized Design.mp4 36.6 MB
  • ~Get Your Files Here !/3 - Static Timing Foundation/11 - Hold Time Condition in Cycle Path.mp4 32.2 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/18 - Good Margin but Higher Latency.mp4 31.8 MB
  • ~Get Your Files Here !/1 - Introduction/1 - Introduction.mp4 31.0 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/25 - Negative Setup Time for Flop.mp4 27.6 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/14 - Setup Violation.mp4 25.7 MB
  • ~Get Your Files Here !/3 - Static Timing Foundation/10 - Setup Time Condition in Cycle Path.mp4 25.2 MB
  • ~Get Your Files Here !/5 - Advanced Concepts for Interview Timing Margins/22 - Negative Latch Setup & Hold Time.mp4 24.9 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/17 - Hold Violation Fix Data Path Delay.mp4 20.0 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/13 - Setup & Hold Margin Computation.mp4 19.7 MB
  • ~Get Your Files Here !/4 - Problem Solving for Interview/20 - Design Issues in Real World SoC.mp4 19.0 MB
  • ~Get Your Files Here !/8 - Practical Design Issue1 Multiple Parallel Paths/33 - Multiple Path Hold Time Analysis.mp4 18.6 MB
  • ~Get Your Files Here !/8 - Practical Design Issue1 Multiple Parallel Paths/32 - Multiple Path Setup Time Analysis.mp4 18.2 MB
[磁力链接] 添加时间:2024-01-05 大小:865.9 MB 最近下载:2024-11-28 热度:1266

Saini S. Advances in Image and Data Processing Using VLSI Design. Vol 2. 2022

  • Saini S. Advances in Image and Data Processing Using VLSI Design. Vol 2. 2022.pdf 43.5 MB
[磁力链接] 添加时间:2023-12-24 大小:43.5 MB 最近下载:2024-11-24 热度:296

Machine Learning Techniques for VLSI Chip Design by Various Authors PDF

  • Machine Learning Techniques for VLSI Chip Design by Various Authors.pdf 41.2 MB
  • read this first + free audiobook version.txt 833 Bytes
[磁力链接] 添加时间:2023-12-22 大小:41.2 MB 最近下载:2024-11-26 热度:1851

Sakuma K. 3D Integration in VLSI Circuits...Tech and App 2018

  • Sakuma K. 3D Integration in VLSI Circuits...Tech and App 2018.pdf 31.8 MB
[磁力链接] 添加时间:2022-03-31 大小:31.8 MB 最近下载:2024-11-25 热度:351

Dillinger T. VLSI Design Methodology Development 2019

  • Dillinger T. VLSI Design Methodology Development 2019.pdf 41.6 MB
[磁力链接] 添加时间:2022-03-23 大小:41.6 MB 最近下载:2024-11-23 热度:384

Chen W.-K. (ed.) - The VLSI Handbook, 2nd edition - 2007.pdf

  • Chen W.-K. (ed.) - The VLSI Handbook, 2nd edition - 2007.pdf 32.3 MB
[磁力链接] 添加时间:2022-02-07 大小:32.3 MB 最近下载:2024-11-29 热度:1210

[ DevCourseWeb.com ] Udemy - VLSI, PLC, Microcontrollers, and Assembly Language

  • ~Get Your Files Here !/20. Computer Systems/1. Computer Systems.mp4 303.4 MB
  • ~Get Your Files Here !/17. Introduction to Microcontrollers/1. Introduction to Microcontrollers.mp4 251.9 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/1. MSP430 Microcontroller - part 1.mp4 245.0 MB
  • ~Get Your Files Here !/1. CMOS Technology/1. CMOS Technology.mp4 219.3 MB
  • ~Get Your Files Here !/8. Assembly Language Fundamentals/1. Assembly Language Fundamentals.mp4 204.8 MB
  • ~Get Your Files Here !/12. Advanced Procedures, Strings, Arrays/1. Advanced Procedures, Strings, Arrays.mp4 179.9 MB
  • ~Get Your Files Here !/15. High Level Language Interface and 16-bit MS DOS Programming/1. High Level Language Interface and 16-bit MS DOS Programming.mp4 174.7 MB
  • ~Get Your Files Here !/3. Basics of PLC/1. Basics of PLC.mp4 143.4 MB
  • ~Get Your Files Here !/7. Assembly Language for Intel based Computers/1. Assembly Language for Intel based Computers.mp4 143.1 MB
  • ~Get Your Files Here !/14. 32-bit Windows Programming/1. 32-bit Windows Programming.mp4 142.0 MB
  • ~Get Your Files Here !/5. Ladder Diagram/1. Ladder Diagram.mp4 139.4 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/3. MSP430 Microcontroller - part 3.mp4 138.8 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/4. MSP430 Microcontroller - part 4.mp4 127.6 MB
  • ~Get Your Files Here !/18. MSP430 Microcontroller/2. MSP430 Microcontroller - part 2.mp4 126.9 MB
  • ~Get Your Files Here !/19. AVR Microcontroller/1. AVR Microcontroller.mp4 120.5 MB
  • ~Get Your Files Here !/10. Conditional Processing/1. Conditional Processing.mp4 114.0 MB
  • ~Get Your Files Here !/11. Integer Arithmetic/1. Integer Arithmetic.mp4 110.9 MB
  • ~Get Your Files Here !/2. VLSI Introduction/1. VLSI Introduction.mp4 92.7 MB
  • ~Get Your Files Here !/9. Procedures/1. Procedures.mp4 78.9 MB
  • ~Get Your Files Here !/16. Disk Usage/1. Disk Usage.mp4 73.8 MB
[磁力链接] 添加时间:2022-01-31 大小:3.3 GB 最近下载:2024-11-29 热度:2486

ASIC Bootcamp for VLSI Engineer- STA Basic Concepts

  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/3. Delay Calculation/1. Delay Calculation.mp4 595.3 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/5. Timing Verification/1. Timing Verification.mp4 581.4 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/4. Constraints Develop/1. Constraints Develop.mp4 430.7 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/6. Special Timing Checks/1. Special Timing Checks.mp4 323.2 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/2. STA Definition/1. What is STA.mp4 305.7 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/9. Sign-off Checklist/1. Sign-off Checklist.mp4 158.8 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/8. STA Methodology/1. STA Methodology.mp4 157.4 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/7. Crosstalk & Noise/1. Crosstalk & Noise.mp4 106.8 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/1. Introduction/1. Course Information.mp4 90.3 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/5. Timing Verification/2.1 Chapter 4.pptx.pptx 2.6 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/3. Delay Calculation/2.1 Chapter 2.pptx.pptx 2.6 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/6. Special Timing Checks/2.1 Chapter 5.pptx.pptx 2.5 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/4. Constraints Develop/2.1 Chapter 3.pptx.pptx 2.1 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/10. Resources/1.1 STA Basic Concepts.pdf.pdf 1.3 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/2. STA Definition/2.1 Chapter 1.pptx.pptx 1.1 MB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/8. STA Methodology/2.1 Chapter 7.pptx.pptx 642.2 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/7. Crosstalk & Noise/2.1 Chapter 6.pptx.pptx 318.2 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/9. Sign-off Checklist/2.1 Chapter 8.pptx.pptx 112.7 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/1. Introduction/1.2 Chapter 0.pptx.pptx 95.3 kB
  • ASIC Bootcamp for VLSI Engineer- STA Basic Concepts/1. Introduction/1.1 Resume Template.docx.docx 27.1 kB
[磁力链接] 添加时间:2022-01-17 大小:2.8 GB 最近下载:2024-11-29 热度:620

[ FreeCourseWeb.com ] Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits (True PDF).zip

  • [ FreeCourseWeb.com ] Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits (True PDF).zip 40.9 MB
[磁力链接] 添加时间:2021-06-11 大小:40.9 MB 最近下载:2024-11-24 热度:1015

[ FreeCourseWeb.com ] Udemy - VLSI - Design For Test (DFT)- JTAG, Boundary SCAN and IJTAG.zip

  • [ FreeCourseWeb.com ] Udemy - VLSI - Design For Test (DFT)- JTAG, Boundary SCAN and IJTAG.zip 544.4 MB
[磁力链接] 添加时间:2021-05-19 大小:544.4 MB 最近下载:2024-11-29 热度:1183

ASIC Bootcamp for VLSI Engineer STA Basic Concepts [UdemyCourseDownloader]

  • 03. Delay Calculation/1. Delay Calculation.mp4 595.3 MB
  • 05. Timing Verification/1. Timing Verification.mp4 581.4 MB
  • 04. Constraints Develop/1. Constraints Develop.mp4 430.7 MB
  • 06. Special Timing Checks/1. Special Timing Checks.mp4 323.2 MB
  • 02. STA Definition/1. What is STA.mp4 305.7 MB
  • 09. Sign-off Checklist/1. Sign-off Checklist.mp4 158.8 MB
  • 08. STA Methodology/1. STA Methodology.mp4 157.4 MB
  • 07. Crosstalk & Noise/1. Crosstalk & Noise.mp4 106.8 MB
  • 01. Introduction/1. Course Information.mp4 90.3 MB
  • 05. Timing Verification/2.1 Chapter 4.pptx.pptx 2.6 MB
  • 03. Delay Calculation/2.1 Chapter 2.pptx.pptx 2.6 MB
  • 06. Special Timing Checks/2.1 Chapter 5.pptx.pptx 2.5 MB
  • 04. Constraints Develop/2.1 Chapter 3.pptx.pptx 2.1 MB
  • 10. Resources/1.1 STA Basic Concepts.pdf.pdf 1.3 MB
  • 02. STA Definition/2.1 Chapter 1.pptx.pptx 1.1 MB
  • 08. STA Methodology/2.1 Chapter 7.pptx.pptx 642.2 kB
  • 07. Crosstalk & Noise/2.1 Chapter 6.pptx.pptx 318.2 kB
  • 09. Sign-off Checklist/2.1 Chapter 8.pptx.pptx 112.7 kB
  • 01. Introduction/1.2 Chapter 0.pptx.pptx 95.3 kB
  • 01. Introduction/1.1 Resume Template.docx.docx 27.1 kB
[磁力链接] 添加时间:2021-05-12 大小:2.8 GB 最近下载:2024-11-29 热度:900

[ FreeCourseWeb.com ] Udemy - VLSI Digital Design using Verilog and hardware- Handson_temp.zip

  • [ FreeCourseWeb.com ] Udemy - VLSI Digital Design using Verilog and hardware- Handson_temp.zip 8.6 GB
[磁力链接] 添加时间:2021-04-19 大小:8.6 GB 最近下载:2024-11-28 热度:1472

[ FreeCourseWeb.com ] Udemy - Become Zero to Hero in vlsi design [comprehensive video].zip

  • [ FreeCourseWeb.com ] Udemy - Become Zero to Hero in vlsi design [comprehensive video].zip 2.9 GB
[磁力链接] 添加时间:2021-04-09 大小:2.9 GB 最近下载:2024-11-28 热度:596


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